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    Image processing apparatus and method, and storage medium therefor
    3.
    发明申请
    Image processing apparatus and method, and storage medium therefor 失效
    图像处理装置和方法及其存储介质

    公开(公告)号：US20050152599A1

    公开(公告)日：2005-07-14

    申请号：US11077588

    申请日：2005-03-10

    申请人： Tetsujiro Kondo ,  Yasunobu Node ,  Takayoshi Fujiwara

    发明人： Tetsujiro Kondo ,  Yasunobu Node ,  Takayoshi Fujiwara

    IPC分类号： G06T7/20 ,  H04N5/14 ,  G06K9/00

    CPC分类号： G06T7/20 ,  H04N5/145

    摘要： In an image processing apparatus, an input image is synthesized with a stored image supplied from a storage unit and having been shifted so that the positions of the pixels in the image areas of the input image and of the stored image, associated with a telop, will coincide. The level distribution of the pixel values of the input image is maintained in the telop.

    摘要翻译： 在图像处理装置中，输入图像与从存储单元提供的存储的图像合成并被移位，使得与输入图像相关联的输入图像和存储图像的图像区域中的像素的位置， 将会重合 输入图像的像素值的电平分布保持在字幕中。

    Memory cell circuit, memory device, motion vector detection device, and motion compensation prediction coding device
    5.
    发明授权
    Memory cell circuit, memory device, motion vector detection device, and motion compensation prediction coding device 失效
    存储单元电路，存储器件，运动矢量检测装置和运动补偿预测编码装置

    公开(公告)号：US07573939B2

    公开(公告)日：2009-08-11

    申请号：US10474840

    申请日：2003-01-10

    申请人： Tetsujiro Kondo ,  Tsutomu Ichikawa ,  Yasunobu Node

    发明人： Tetsujiro Kondo ,  Tsutomu Ichikawa ,  Yasunobu Node

    IPC分类号： H04N7/12 ,  H04N11/02

    CPC分类号： G11C11/417 ,  G11C8/14

    摘要： The invention relates to a memory device and the like. The memory device comprises one or more memory block. The memory block has a memory cell array consists of multiple memory cells (210) arranged in a matrix form. A region of the multiple memory cells (210) includes multiple divisional domains (201a-201e) divided in the direction along word line (WL). Each of the word lines (WL) has multiple divisional selection lines (WLa-WLe) divided corresponding to the multiple divisional domains. The memory block has a switching mechanism (220) for switching the divisional word lines (WL) that are to be simultaneously activated in each of the divisional domains. Multiple memory cells (210) associated with each of the divisional word lines store a horizontal or vertical array of pixel data. The inventive memory device enables simultaneous access to multiple items of pixel data constituting a pixel block having an arbitrary configuration.

    摘要翻译： 本发明涉及一种存储器件等。 存储器件包括一个或多个存储器块。 存储器块具有存储单元阵列，其由以矩阵形式布置的多个存储单元（210）组成。 多个存储单元（210）的区域包括沿着字线（WL）的方向划分的多个分区域（201a-201e）。 每个字线（WL）具有对应于多个分割域划分的多个分割选择线（WLa-WLe）。 存储器块具有切换机构（220），用于切换在每个分割域中将被同时激活的划分字线（WL）。 与每个分割字线相关联的多个存储器单元（210）存储像素数据的水平或垂直阵列。 本发明的存储器件能够同时访问构成具有任意配置的像素块的多个像素数据项。

    MEMORY CELL CIRCUIT, MEMORY DEVICE, MOTION VECTOR DETECTOR, AND MOTION COMPENSATION PREDICTIVE ENCODER
    6.
    发明申请
    MEMORY CELL CIRCUIT, MEMORY DEVICE, MOTION VECTOR DETECTOR, AND MOTION COMPENSATION PREDICTIVE ENCODER 审中-公开
    存储单元电路，存储器件，运动矢量检测器和运动补偿预测编码器

    公开(公告)号：US20090154566A1

    公开(公告)日：2009-06-18

    申请号：US12341371

    申请日：2008-12-22

    申请人： Tetsujiro Kondo ,  Tsutomu Ichikawa ,  Yasunobu Node

    发明人： Tetsujiro Kondo ,  Tsutomu Ichikawa ,  Yasunobu Node

    IPC分类号： H04N7/26 ,  H04N7/01 ,  G06F12/00

    CPC分类号： G11C11/417 ,  G11C8/14

    摘要： The invention relates to a memory device and the like. The memory device comprises one or more memory block. The memory block has a memory cell array consists of multiple memory cells (210) arranged in a matrix form. A region of the multiple memory cells (210) includes multiple divisional domains (201a-201e) divided in the direction along word line (WL). Each of the word lines (WL) has multiple divisional selection lines (WLa-WLe) divided corresponding to the multiple divisional domains. The memory block has a switching mechanism (220) for switching the divisional word lines (Wt) that are to be simultaneously activated in each of the divisional domains. Multiple memory cells (210) associated with each of the divisional word lines store a horizontal or vertical array of pixel data. The inventive memory device enables simultaneous access to multiple items of pixel data constituting a pixel block having an arbitrary configuration.

    摘要翻译： 本发明涉及一种存储器件等。 存储器件包括一个或多个存储器块。 存储器块具有存储单元阵列，其由以矩阵形式布置的多个存储单元（210）组成。 多个存储单元（210）的区域包括沿着字线（WL）的方向划分的多个分区域（201a-201e）。 每个字线（WL）具有对应于多个分割域划分的多个分割选择线（WLa-WLe）。 存储器块具有切换机构（220），用于切换在每个分割域中将被同时激活的划分字线（Wt）。 与每个分割字线相关联的多个存储器单元（210）存储像素数据的水平或垂直阵列。 本发明的存储器件能够同时访问构成具有任意配置的像素块的多个像素数据项。

    Image processing system, image processing method, program, and recording medium
    7.
    发明授权
    Image processing system, image processing method, program, and recording medium 失效
    图像处理系统，图像处理方法，程序和记录介质

    公开(公告)号：US07085318B2

    公开(公告)日：2006-08-01

    申请号：US10049553

    申请日：2001-06-15

    申请人： Tetsujiro Kondo ,  Hisakazu Shiraki ,  Yasunobu Node ,  Katsuhisa Shinmei

    发明人： Tetsujiro Kondo ,  Hisakazu Shiraki ,  Yasunobu Node ,  Katsuhisa Shinmei

    IPC分类号： H04N7/12

    CPC分类号： H04N7/0125 ,  H04N5/21 ,  H04N19/117 ,  H04N19/137 ,  H04N19/59 ,  H04N19/98

    摘要： A picture processing apparatus for generating an output picture signal with higher quality than the input picture signal. A first signal processor has a storage device for storing a picture signal with the same quality as the output picture signal. The input picture signal and the stored picture signal are added to generate a first picture signal with higher quality than the input picture, which is stored in the storage device. A second signal processor performs a class categorizing adaptive process by extracting a feature of the input picture signal corresponding to the position of a considered pixel of the output picture signal, categorizing the considered pixel as one of a plurality of classes corresponding to the feature, and calculating the input picture signal using a predetermined calculating method corresponding to the categorized class, thereby generating a second picture signal with higher quality than the input picture signal. One of the first and second picture signals is selected as the output picture signal.

    摘要翻译： 一种图像处理装置，用于产生质量高于输入图像信号的输出图像信号。 第一信号处理器具有用于存储与输出图像信号具有相同质量的图像信号的存储装置。 添加输入图像信号和存储的图像信号以产生比存储在存储装置中的输入图像更高质量的第一图像信号。 第二信号处理器通过提取与输出图像信号的所考虑的像素的位置相对应的输入图像信号的特征来执行类分类自适应处理，将所考虑的像素分类为与特征对应的多个类别之一，以及 使用对应于分类的预定计算方法计算输入图像信号，从而生成质量高于输入图像信号的第二图像信号。 选择第一和第二图像信号之一作为输出图像信号。

    Signal processing device and control method, signal processing method, program, and signal processing system
    10.
    发明授权
    Signal processing device and control method, signal processing method, program, and signal processing system 失效
    信号处理装置和控制方法，信号处理方法，程序和信号处理系统

    公开(公告)号：US07975085B2

    公开(公告)日：2011-07-05

    申请号：US12416518

    申请日：2009-04-01

    申请人： Masaaki Hattori ,  Tetsujiro Kondo ,  Hideo Nakaya ,  Nobuyuki Asakura ,  Toshihiko Hamamatsu ,  Yasunobu Node ,  Masanori Machimura ,  Hiroto Kimura ,  Yasuhiko Suga

    发明人： Masaaki Hattori ,  Tetsujiro Kondo ,  Hideo Nakaya ,  Nobuyuki Asakura ,  Toshihiko Hamamatsu ,  Yasunobu Node ,  Masanori Machimura ,  Hiroto Kimura ,  Yasuhiko Suga

    IPC分类号： G06F3/00 ,  G06F13/00 ,  G06F13/12 ,  G06F13/18

    CPC分类号： G06F13/4059

    摘要： A signal processing device controls a plurality of signal processing units that process an input signal inputted via a signal line with wide bandwidth, via a control line with narrow bandwidth or the signal line, and includes: a storing unit configured to store correspondence information that associates instruction information indicating an instruction of control with respect to each of the signal processing units, with control information related to all of the plurality of signal processing units, among pieces of control information necessary for each of the signal processing units to execute content of control; and a transmitting unit configured to transmit the control information associated with the instruction information by the correspondence information, to the plurality of signal processing units via the signal line, when control is instructed with respect to the plurality of signal processing units.

    摘要翻译： 信号处理装置控制经由宽带宽的信号线输入的输入信号经由窄带宽的信号线或信号线进行处理的多个信号处理部，其特征在于，包括：存储部， 在每个信号处理单元执行控制内容所需的控制信息中，指示与每个信号处理单元相关的控制指令的指示信息，与多个信号处理单元全部相关的控制信息; 以及发送单元，被配置为当针对所述多个信号处理单元指示控制时，经由所述信号线将与所述对应信息相关联的与所述指令信息相关联的控制信息发送到所述多个信号处理单元。