公开(公告)号：US07677957B2

公开(公告)日：2010-03-16

申请号：US12003839

申请日：2008-01-02

申请人： Yasutsugu Soeta

发明人： Yasutsugu Soeta

IPC分类号： B24B5/00

CPC分类号： B24B37/26 ,  H01L21/30625 ,  H01L21/3212

摘要： The present invention is a polishing pad used for polishing a semiconductor substrate, wherein, at least, grooves having a radial pattern are formed on a surface of the polishing pad, and so that a groove depth of the groove parts located nearer to the center than the substrate is shallower than a groove depth of the groove parts existing immediately below the substrate, and an intersection point where the grooves overlap each other at the central part of the radial pattern of the grooves does not exist immediately below the substrate. A method for processing the pad, and a method for producing a substrate using this pad are also disclosed.

摘要翻译： 本发明是用于研磨半导体衬底的抛光垫，其中至少在抛光垫的表面上形成具有径向图案的凹槽，并且使凹槽部分的凹槽深度位于比中心更靠近 基板比在基板正下方存在的槽部的槽深浅，并且在槽的径向图案的中心部分处的槽彼此重叠的交点在基板的正下方不存在。 还公开了一种用于处理垫的方法，以及使用该垫的基板的制造方法。

公开(公告)号：US20080139094A1

公开(公告)日：2008-06-12

申请号：US12003839

申请日：2008-01-02

申请人： Yasutsugu Soeta

发明人： Yasutsugu Soeta

IPC分类号： B24D11/00

CPC分类号： B24B37/26 ,  H01L21/30625 ,  H01L21/3212

摘要： The present invention is a polishing pad used for polishing a semiconductor substrate, wherein, at least, grooves having a radial pattern are formed on a surface of the polishing pad, and so that a groove depth of the groove parts located nearer to the center than the substrate is shallower than a groove depth of the groove parts existing immediately below the substrate, and an intersection point where the grooves overlap each other at the central part of the radial pattern of the grooves does not exist immediately below the substrate. A method for processing the pad, and a method for producing a substrate using this pad are also disclosed.

摘要翻译： 本发明是用于研磨半导体衬底的抛光垫，其中至少在抛光垫的表面上形成具有径向图案的凹槽，并且使凹槽部分的凹槽深度位于比中心更靠近 基板比在基板正下方存在的槽部的槽深浅，并且在槽的径向图案的中心部分处的槽彼此重叠的交点在基板的正下方不存在。 还公开了一种用于处理垫的方法，以及使用该垫的基板的制造方法。

公开(公告)号：US20070032175A1

公开(公告)日：2007-02-08

申请号：US10573497

申请日：2004-09-17

申请人： Yasutsugu Soeta

发明人： Yasutsugu Soeta

IPC分类号： B24B7/30 ,  B24B1/00 ,  B24D11/00

CPC分类号： B24B37/26 ,  H01L21/30625 ,  H01L21/3212

摘要： The present invention is a polishing pad used for polishing a semiconductor substrate, wherein, at least, grooves having a radial pattern are formed on a surface of the polishing pad, and (an average value of the sum totals of the groove volumes in parts immediately below the substrate/area of the substrate) is 0.06 to 0.23, or the grooves are formed so that a groove depth of the groove parts located nearer to the center than the substrate is shallower than a groove depth of the groove parts existing immediately below the substrate, and an intersection point where the grooves overlap each other at the central part of the radial pattern of the grooves does not exist immediately below the substrate, a method for processing it, and a method for producing a substrate using this. Thereby, there can be provided a polishing pad, by which in the polishing of a semiconductor substrate, a required amount of a polishing agent is supplied to the central part of the substrate and thereby polishing can be performed with high flatness and furthermore the semiconductor substrate surface is not flawed because peeling, twist, or burr does not occur, a method for processing it, and a method for producing a substrate.

摘要翻译： 本发明是一种用于抛光半导体衬底的抛光垫，其中至少在抛光垫的表面上形成具有径向图案的凹槽，并且（立即的部分中的凹槽体积的总和的平均值） 在基板的下方/面积的下方）为0.06〜0.23，或者形成凹槽，使得位于比基板中心更靠近中心的凹槽部分的凹槽深度比直接存在于凹槽部分的凹槽部分的凹槽深度浅 基板，并且沟槽的径向图案的中心部分处的沟槽彼此重叠的交点不在基板的正下方，其处理方法以及使用该基板的基板的制造方法。 因此，可以提供一种抛光垫，通过该抛光垫，在半导体基板的研磨中，将所需量的抛光剂供给到基板的中心部分，从而可以以高平坦度进行抛光，此外，半导体基板 表面没有缺陷，因为不会发生剥离，扭曲或毛刺，其加工方法和基材的制造方法。

公开(公告)号：US07776719B2

公开(公告)日：2010-08-17

申请号：US12227436

申请日：2007-05-14

申请人： Yasutsugu Soeta ,  Nobuhiko Noto

发明人： Yasutsugu Soeta ,  Nobuhiko Noto

IPC分类号： H01L21/46

CPC分类号： H01L21/76254 ,  H01L21/3065

摘要： A method is provided for manufacturing a bonded wafer by an ion implantation delamination method, including bonding a base wafer with a bond wafer having a microbubble layer formed by ion implantation, delaminating the wafers along the micro bubble layer as a boundary, and removing a periphery of a thin film formed on the base wafer by the delamination. The removal step is performed by dry etching that supplies an etching gas from a nozzle, and the dry etching is performed by adjusting an inner diameter of the gas-jetting port of the nozzle, and a distance between the gas-jetting port of the nozzle and a surface of the thin film.

摘要翻译： 提供了一种用于通过离子注入分层方法制造接合晶片的方法，包括将基底晶片与具有通过离子注入形成的微泡层的接合晶片接合，沿着微气泡层将晶片分层作为边界，以及去除外围 通过分层在基底晶片上形成的薄膜。 通过从喷嘴提供蚀刻气体的干蚀刻进行去除步骤，并且通过调节喷嘴的气体喷射口的内径和喷嘴的喷气口之间的距离来进行干法蚀刻 和薄膜的表面。

公开(公告)号：US20090170285A1

公开(公告)日：2009-07-02

申请号：US12227436

申请日：2007-05-14

申请人： Yasutsugu Soeta ,  Nobuhiko Noto

发明人： Yasutsugu Soeta ,  Nobuhiko Noto

IPC分类号： H01L21/46

CPC分类号： H01L21/76254 ,  H01L21/3065

摘要： The present invention provides a method for manufacturing a bonded wafer by an ion implantation delamination method, the method including at least the steps of bonding a base wafer with a bond wafer having a microbubble layer formed by ion implantation, delaminating the wafers along the micro bubble layer as a boundary, and removing a periphery of a thin film formed on the base wafer by the delamination step, wherein at least the thin-film periphery removal step after the delamination step is performed by dry etching that supplies an etching gas from a nozzle, and the dry etching is performed by adjusting an inner diameter of the gas-jetting port of the nozzle, and a distance between the gas-jetting port of the nozzle and a surface of the thin film. As a result of this, there is provided the method for manufacturing the bonded wafer, in which removal of the thin-film periphery can be easily performed and a removal width is also reproducibly obtained well in the thin-film periphery removal step, and degradation in quality of the thin film can be effectively prevented.

摘要翻译： 本发明提供了一种通过离子注入分层方法制造接合晶片的方法，所述方法至少包括将基底晶片与具有通过离子注入形成的微泡层的接合晶片接合的步骤，沿着微泡分解晶片 层，并且通过分层步骤除去形成在基底晶片上的薄膜的周边，其中至少在分层步骤之后的薄膜外周去除步骤通过从喷嘴提供蚀刻气体的干法蚀刻来进行 并且通过调节喷嘴的气体喷射口的内径以及喷嘴的喷气口与薄膜的表面之间的距离来进行干法蚀刻。 结果，提供了制造接合晶片的方法，其中可以容易地去除薄膜周边，并且在薄膜周边去除步骤中也可以很好地获得去除宽度，并且降解 可以有效地防止薄膜的质量。

公开(公告)号：US20090117706A1

公开(公告)日：2009-05-07

申请号：US11887574

申请日：2006-04-04

申请人： Yasutsugu Soeta ,  Yasuo Nagaoka

发明人： Yasutsugu Soeta ,  Yasuo Nagaoka

IPC分类号： H01L21/762

CPC分类号： H01L21/76254

摘要： There is provided a method of manufacturing an SOI wafer by an ion implantation delamination method, comprising at least: forming an oxide film on a surface of at least one of a base wafer and a bond wafer functioning as an SOI layer; implanting at least one of a hydrogen ion and a rare gas ion from a surface of the bond wafer to form an ion implanted layer; subsequently bringing the bond wafer into close contact with the base wafer via the oxide film; performing a heat treatment to cause delamination in the ion implanted layer so that the SOI layer is formed; then conducing a heat treatment in an oxidizing atmosphere to form an oxide film on the surface of the SOI layer; subsequently removing the oxide film by etching; then cleaning the surface of the SOI layer by using ozone water; and polishing the same. As a result, in an ion implantation delamination method, a method of manufacturing a high-quality SOI wafer which can remove a damaged layer and surface roughness remaining on the SOI layer surface after delamination while maintaining film thickness uniformity of the SOI layer is provided.

摘要翻译： 提供了一种通过离子注入分层方法制造SOI晶片的方法，该方法至少包括：在用作SOI层的基底晶片和接合晶片中的至少一个的表面上形成氧化膜; 从接合晶片的表面注入氢离子和稀有气体离子中的至少一种以形成离子注入层; 随后通过氧化膜使接合晶片与基底晶片紧密接触; 进行热处理，使离子注入层分层，形成SOI层; 然后在氧化气氛中进行热处理，以在SOI层的表面上形成氧化膜; 随后通过蚀刻去除氧化膜; 然后用臭氧水清洗SOI层的表面; 并抛光。 结果，在离子注入剥离方法中，提供了一种制造可以去除损伤层的高质量SOI晶片的方法和在分层之后残留在SOI层表面上的表面粗糙度，同时保持SOI层的膜厚均匀性。

公开(公告)号：US07591713B2

公开(公告)日：2009-09-22

申请号：US10573497

申请日：2004-09-17

申请人： Yasutsugu Soeta

发明人： Yasutsugu Soeta

IPC分类号： B24B7/30 ,  B24D11/00

CPC分类号： B24B37/26 ,  H01L21/30625 ,  H01L21/3212

摘要： The present invention is a polishing pad used for polishing a semiconductor substrate, wherein, at least, grooves having a radial pattern are formed on a surface of the polishing pad, and (an average value of the sum totals of the groove volumes in parts immediately below the substrate/area of the substrate) is 0.06 to 0.23, or the grooves are formed so that a groove depth of the groove parts located nearer to the center than the substrate is shallower than a groove depth of the groove parts existing immediately below the substrate, and an intersection point where the grooves overlap each other at the central part of the radial pattern of the grooves does not exist immediately below the substrate, a method for processing it, and a method for producing a substrate using this. Thereby, there can be provided a polishing pad, by which in the polishing of a semiconductor substrate, a required amount of a polishing agent is supplied to the central part of the substrate and thereby polishing can be performed with high flatness and furthermore the semiconductor substrate surface is not flawed because peeling, twist, or burr does not occur, a method for processing it, and a method for producing a substrate.

摘要翻译： 本发明是一种用于抛光半导体衬底的抛光垫，其中至少在抛光垫的表面上形成具有径向图案的凹槽，并且（立即的部分中的凹槽体积的总和的平均值） 在基板的下方/面积的下方）为0.06〜0.23，或者形成凹槽，使得位于比基板中心更靠近中心的凹槽部分的凹槽深度比在紧邻正下方的凹槽部分的凹槽深度浅 基板，并且沟槽的径向图案的中心部分处的沟槽彼此重叠的交点不在基板的正下方，其处理方法以及使用该基板的基板的制造方法。 因此，可以提供一种抛光垫，通过该抛光垫，在半导体基板的研磨中，将所需量的抛光剂供给到基板的中心部分，从而可以以高平坦度进行抛光，此外，半导体基板 表面没有缺陷，因为不会发生剥离，扭曲或毛刺，其加工方法和基材的制造方法。