Post metal code engineering for a ROM
    2.
    发明授权
    Post metal code engineering for a ROM 失效
    ROM的后金属代码工程

    公开(公告)号:US6020241A

    公开(公告)日:2000-02-01

    申请号:US995338

    申请日:1997-12-22

    CPC classification number: H01L27/11293 H01L27/1126

    Abstract: The present invention provides a method of manufacturing a read only memory that is code implanted late in the process after the first level metal thus reducing the turn around time to ship a customer order. The invention comprising the steps of: forming bit lines 125 and word lines 160 in a cell area 12A and MOS transistors in a peripheral area 13 of an integrated circuit; forming a first dielectric layer 300 over the surface; etching back the first dielectric layer 300 in the cell area; forming metal contacts 700 to the MOS devices in the peripheral areas 13; forming the second dielectric layer 320 over the resultant surface, storing the integrated circuit; and programming the ROM region 12A by the steps of forming a Code mask 340 with openings 340A from over portions of word lines in the cell area and implanting impurities through the openings 340A into substrate under the selected word lines 160 thereby programming the ROM device.

    Abstract translation: 本发明提供了一种制造只读存储器的方法,该只读存储器是在第一级金属之后的过程中植入的代码,因此减少了轮询周转时间来运送客户订单。 本发明包括以下步骤:在单元区域12A中形成位线125和字线160,并在集成电路的外围区域13中形成MOS晶体管; 在表面上形成第一电介质层300; 在单元区域中蚀刻第一介电层300; 将金属触点700形成到周边区域13中的MOS器件; 在所得表面上形成第二电介质层320,存储集成电路; 并且通过以下步骤对ROM区域12A进行编程:步骤:从单元区域中的字线的多个部分形成具有开口340A的代码掩码340,并且通过开口340A将杂质注入到所选字线160之下的衬底中,从而对ROM器件进行编程。

    Alignment dip back oxide and code implant through poly to approach the depletion mode device character
    3.
    发明授权
    Alignment dip back oxide and code implant through poly to approach the depletion mode device character 有权
    对准反向氧化物和代码植入通过多晶硅接近耗尽模式器件特性

    公开(公告)号:US06238983B1

    公开(公告)日:2001-05-29

    申请号:US09385521

    申请日:1999-08-30

    CPC classification number: H01L27/1126

    Abstract: A metal code process for a read-only memory (ROM) combines the alignment dip back process (to reduce the polyoxide thickness over the gate electrode and to protect the field oxide) with a double charge implant approach to provide the function of a depletion mode ROM cell. The alignment dip back process also avoids leakage current problems. A stable depletion mode device character is achieved by implant step energies greater than 150 keV.

    Abstract translation: 用于只读存储器(ROM)的金属代码处理将双向电荷注入方法组合到对准反向处理(以减小栅电极上的多晶氧化物厚度并保护场氧化物),以提供耗尽模式的功能 ROM单元。 对准回退过程也避免了漏电流问题。 通过大于150keV的注入步进能量实现稳定的耗尽模式器件特性。

    Capacitor and inductor scheme with e-fuse application
    4.
    发明授权
    Capacitor and inductor scheme with e-fuse application 有权
    具有电子熔丝应用的电容器和电感器方案

    公开(公告)号:US07348654B2

    公开(公告)日:2008-03-25

    申请号:US11106089

    申请日:2005-04-14

    Abstract: RF devices formed in integrated circuit devices include a top metal level overlying a substrate. The top metal level comprises pads and portions of planned RF devices and an RF metal level overlying the top metal level completes the RF devices which may be an interconnected RF network that may include capacitors, inductors or both. Openings are formed in a passivation layer overlying the RF metal level to provide direct access to the RF devices. The interconnected RF network may include fuses enabling the network to be selectively altered by cutting relatively thin interconnect lines using a laser directed through the openings. The RF devices or portions of the RF network may be directly coupled to external devices and utilized in SOC (System On a Chip) and SIT (System In Package) technologies.

    Abstract translation: 在集成电路器件中形成的RF器件包括覆盖衬底的顶部金属层。 顶部金属层包括焊盘和部分计划的RF器件,覆盖在顶部金属层上的RF金属级完成RF器件,RF器件可以是可以包括电容器,电感器或两者的互连RF网络。 开口形成在覆盖RF金属层的钝化层中,以提供对RF器件的直接访问。 互连的RF网络可以包括使得能够通过使用通过开口引导的激光切割相对薄的互连线来选择性地改变网络的熔丝。 RF设备或RF网络的部分可以直接耦合到外部设备并且用于SOC(片上系统)和SIT(系统级封装)技术中。

    Capacitor and inductor scheme with e-fuse application
    5.
    发明申请
    Capacitor and inductor scheme with e-fuse application 有权
    具有电子熔丝应用的电容器和电感器方案

    公开(公告)号:US20050194350A1

    公开(公告)日:2005-09-08

    申请号:US11106089

    申请日:2005-04-14

    Abstract: RF devices formed in integrated circuit devices include a top metal level overlying a substrate. The top metal level comprises pads and portions of planned RF devices and an RF metal level overlying the top metal level completes the RF devices which may be an interconnected RF network that may include capacitors, inductors or both. Openings are formed in a passivation layer overlying the RF metal level to provide direct access to the RF devices. The interconnected RF network may include fuses enabling the network to be selectively altered by cutting relatively thin interconnect lines using a laser directed through the openings. The RF devices or portions of the RF network may be directly coupled to external devices and utilized in SOC (System On a Chip) and SIT (System In Package) technologies.

    Abstract translation: 在集成电路器件中形成的RF器件包括覆盖衬底的顶部金属层。 顶部金属层包括焊盘和部分计划的RF器件,覆盖在顶部金属层上的RF金属级完成RF器件,RF器件可以是可以包括电容器,电感器或两者的互连RF网络。 开口形成在覆盖RF金属层的钝化层中,以提供对RF器件的直接访问。 互连的RF网络可以包括使得能够通过使用通过开口引导的激光切割相对薄的互连线来选择性地改变网络的熔丝。 RF设备或RF网络的部分可以直接耦合到外部设备并且用于SOC(片上系统)和SIT(系统级封装)技术中。

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