Abstract:
A switching power supply apparatus with current output limit, which utilizes a voltage sampling controller for sampling the feedback voltage to acquire a knee voltage. Moreover, the knee voltage is computed by the square-root operation and error elimination operation respectively. According to the result of the computing, the switching of the power switch is controlled so as to stabilize the output voltage and limit the output current.
Abstract:
A synchronous rectifier control device comprises a status detecting unit, an analog circuit, a first counter, a second counter and a signal process unit. The status detecting unit receives at least one reference signal and a detecting signal to generate a first synchronous control signal. The analog circuit generates a delay signal in accordance with the first synchronous control signal. The first counter receives a clock signal and generates a first counter signal in accordance with the first synchronous control signal, the clock signal, and the delay signal. The second counter receives the clock signal and generates a second counter signal in accordance with the first synchronous control signal, the clock signal, and the first counter signal. The signal process unit generates a second synchronous control signal in accordance with the first synchronous control signal and the second signal.
Abstract:
A synchronous rectifier control device comprises a status detecting unit, an analog circuit, a first counter, a second counter and a signal process unit. The status detecting unit receives at least one reference signal and a detecting signal to generate a first synchronous control signal. The analog circuit generates a delay signal in accordance with the first synchronous control signal. The first counter receives a clock signal and generates a first counter signal in accordance with the first synchronous control signal, the clock signal, and the delay signal. The second counter receives the clock signal and generates a second counter signal in accordance with the first synchronous control signal, the clock signal, and the first counter signal. The signal process unit generates a second synchronous control signal in accordance with the first synchronous control signal and the second signal.