公开(公告)号：US11759757B1

公开(公告)日：2023-09-19

申请号：US18066055

申请日：2022-12-14

申请人： Chun-Ming Lin

发明人： Chun-Ming Lin

IPC分类号： B01F31/31 ,  B01F33/451 ,  B01F31/20 ,  C25D21/10 ,  C23C18/16 ,  B01F101/00

CPC分类号： B01F33/451 ,  B01F31/27 ,  B01F31/31 ,  B01F2101/2204 ,  C23C18/1669 ,  C25D21/10

摘要： The present disclosure provides a device for assisting agitation of liquid. The device includes a frame having a bottom and a sidewall forming an angle with the bottom; a first flexible film attached to the frame at a periphery portion of the first flexible film; a first magnetic field generator at the sidewall of the frame and adjacent to the periphery portion of the first flexible film; and a second magnetic field generator at the bottom of the frame, wherein the first magnetic field generator and the second magnetic field generator are configured to provide a magnetic field parallel to at least a portion of the first flexible film, and wherein a portion of the frame and the first flexible film are configured to be in contact with the solution.

公开(公告)号：US20120225529A1

公开(公告)日：2012-09-06

申请号：US13465551

申请日：2012-05-07

申请人： Chieh-Hao Chen ,  Hao-Ming Lien ,  Ssu-Yu Li ,  Jun-Lin Yeh ,  Kang-Cheng Lin ,  Kuo-Tai Huang ,  Chii-Horng Li ,  Chien-Liang Chen ,  Chung-Hau Fei ,  Wen-Chih Yang ,  Jin-Aun Ng ,  Chi Hsin Chang ,  Chun Ming Lin ,  Harry Chuang

发明人： Chieh-Hao Chen ,  Hao-Ming Lien ,  Ssu-Yu Li ,  Jun-Lin Yeh ,  Kang-Cheng Lin ,  Kuo-Tai Huang ,  Chii-Horng Li ,  Chien-Liang Chen ,  Chung-Hau Fei ,  Wen-Chih Yang ,  Jin-Aun Ng ,  Chi Hsin Chang ,  Chun Ming Lin ,  Harry Chuang

IPC分类号： H01L21/336 ,  H01L21/425

CPC分类号： H01L21/28088 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833

摘要： The present disclosure provides a semiconductor device that includes a semiconductor substrate and a transistor formed in the substrate. The transistor includes a gate stack having a high-k dielectric and metal gate, a sealing layer formed on sidewalls of the gate stack, the sealing layer having an inner edge and an outer edge, the inner edge interfacing with the sidewall of the gate stack, a spacer formed on the outer edge of the sealing layer, and a source/drain region formed on each side of the gate stack, the source/drain region including a lightly doped source/drain (LDD) region that is aligned with the outer edge of the sealing layer.

摘要翻译： 本公开提供一种半导体器件，其包括半导体衬底和形成在衬底中的晶体管。 晶体管包括具有高k电介质和金属栅极的栅极堆叠，形成在栅极叠层的侧壁上的密封层，密封层具有内边缘和外边缘，内边缘与栅叠层的侧壁相接合 ，形成在密封层的外边缘上的隔离物和形成在栅极堆叠的每一侧上的源极/漏极区域，源极/漏极区域包括与外部电极对准的轻掺杂源极/漏极（LDD）区域 密封层的边缘。

公开(公告)号：US20080183980A1

公开(公告)日：2008-07-31

申请号：US11808665

申请日：2007-06-12

申请人： Chun-Ming Lin ,  Chien-Po Yang

发明人： Chun-Ming Lin ,  Chien-Po Yang

IPC分类号： G06F12/00

CPC分类号： G06F12/1433

摘要： A method for locking data of a program memory embedded in a microcontroller is provided. The method keeps the data stored in the program memory from being dumped. The program memory consists of a one-time-programmable read only memory and is configured into a plurality of storage sectors. The method, according to the present invention, first receives a lock command in which the lock command corresponds to a specific storage sector of the program memory. Next, according to the lock command, which storage sector is the specific sector is recognized. Finally, an access lock module is activated for locking the specific storage sector.

摘要翻译： 提供一种用于锁定嵌入在微控制器中的程序存储器的数据的方法。 该方法使存储在程序存储器中的数据不会被转储。 程序存储器由一次性可编程只读存储器组成，并被配置成多个存储扇区。 根据本发明的方法首先接收锁定命令，其中锁定命令对应于程序存储器的特定存储扇区。 接下来，根据锁定命令，识别哪个存储扇区是特定扇区。 最后，启用访问锁定模块来锁定特定的存储扇区。

公开(公告)号：US12087662B1

公开(公告)日：2024-09-10

申请号：US18333130

申请日：2023-06-12

申请人： Chun-Ming Lin

发明人： Chun-Ming Lin

IPC分类号： H01L23/34 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/373 ,  H01L25/065

CPC分类号： H01L23/3736 ,  H01L23/3107 ,  H01L23/367 ,  H01L24/05 ,  H01L24/16 ,  H01L24/32 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05647 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32245

摘要： The present disclosure provides a package structure and a method for forming a package structure. The package structure includes a first die having a front surface and a back surface opposite to the front surface; and a thermal management structure over the back surface. The thermal management structure includes a first copper-phosphorous alloy layer thermally coupled to the back surface of the first die.

公开(公告)号：US08952276B2

公开(公告)日：2015-02-10

申请号：US13659784

申请日：2012-10-24

申请人： Chun Ming Lin

发明人： Chun Ming Lin

IPC分类号： G01G19/00 ,  G01G19/52 ,  G01G19/58 ,  G01G21/28

CPC分类号： A45C13/30 ,  A45C5/14 ,  A45C13/20 ,  A45C15/00 ,  G01G19/58

摘要： A suitcase scale is bundled a suitcase for providing functions of scaling and anti-theft. The suitcase scale comprises a housing, a processing unit disposed in the housing, a weight sensor secured in the housing and electrically connected to the processing unit, a combination lock mounted into the housing, a buckle detachably engaged to the housing and a strap having two opposite ends respectively connected to the buckle and the housing. Consequently, the strap, the buckle and the housing form an endless ring for bundling the suitcase when the combination lock is in a locked condition. The suitcase scale immediately shows the total weight value of the suitcase to prevent the user from paying and excessive baggage charge and provides a function of anti-theft due to the combination lock such that a thief or a pickpocket can not steal the belongings in the locked suitcase.

摘要翻译： 手提箱秤捆绑了一个手提箱，用于提供缩放和防盗功能。 手提箱秤包括壳体，设置在壳体中的处理单元，固定在壳体中并电连接到处理单元的重量传感器，安装到壳体中的组合锁，可拆卸地接合到壳体的带扣和具有两个 相对端分别连接到带扣和外壳。 因此，当组合锁处于锁定状态时，带，带扣和壳体形成用于捆扎手提箱的环形环。 行李箱秤立即显示手提箱的总重量值，以防止用户支付和超重的行李费用，并提供由于组合锁定的防盗功能，使得小偷或扒手不能窃取锁定的物品 手提箱。

公开(公告)号：US20090168464A1

公开(公告)日：2009-07-02

申请号：US12155353

申请日：2008-06-03

申请人： Chun-Ming Lin ,  Ta-Ching Hsu ,  Yun-Kang Chu

发明人： Chun-Ming Lin ,  Ta-Ching Hsu ,  Yun-Kang Chu

IPC分类号： H02M3/335

CPC分类号： H02M3/33592 ,  Y02B70/1475

摘要： A synchronous rectifier control device comprises a status detecting unit, an analog circuit, a first counter, a second counter and a signal process unit. The status detecting unit receives at least one reference signal and a detecting signal to generate a first synchronous control signal. The analog circuit generates a delay signal in accordance with the first synchronous control signal. The first counter receives a clock signal and generates a first counter signal in accordance with the first synchronous control signal, the clock signal, and the delay signal. The second counter receives the clock signal and generates a second counter signal in accordance with the first synchronous control signal, the clock signal, and the first counter signal. The signal process unit generates a second synchronous control signal in accordance with the first synchronous control signal and the second signal.

摘要翻译： 同步整流器控制装置包括状态检测单元，模拟电路，第一计数器，第二计数器和信号处理单元。 状态检测单元接收至少一个参考信号和检测信号以产生第一同步控制信号。 模拟电路根据第一同步控制信号产生延迟信号。 第一计数器接收时钟信号，并根据第一同步控制信号，时钟信号和延迟信号产生第一计数器信号。 第二计数器接收时钟信号，并根据第一同步控制信号，时钟信号和第一计数器信号产生第二计数器信号。 信号处理单元根据第一同步控制信号和第二信号产生第二同步控制信号。

公开(公告)号：US20090161396A1

公开(公告)日：2009-06-25

申请号：US12155860

申请日：2008-06-11

申请人： Chun-Ming Lin ,  Hsin-Yu Pan

发明人： Chun-Ming Lin ,  Hsin-Yu Pan

IPC分类号： H02M7/00

CPC分类号： H02M3/33592 ,  Y02B70/1475

摘要： Disclosed are a synchronous rectifier control device and a forward synchronous rectifier circuit. The synchronous rectifier control device is coupled with the secondary side of the forward synchronous rectifier circuit, comprising a condition detecting unit, a reference time circuit and a synchronous signal generator. The condition detecting unit receives at least one reference signal and a detecting signal in response to the condition of the secondary side of the forward synchronous rectifier circuit, and accordingly generates a first synchronous control signal. The reference time circuit is coupled with the condition detecting unit, and generates a reference time signal in response to the first synchronous control signal. The synchronous signal generator generates a second synchronous control signal in response to the first synchronous control signal and the reference time signal.

摘要翻译： 公开了一种同步整流器控制装置和正向同步整流电路。 同步整流器控制装置与正向同步整流电路的次级侧耦合，包括状态检测单元，基准时间电路和同步信号发生器。 条件检测单元响应于正向同步整流电路的次级侧的状态接收至少一个参考信号和检测信号，并且因此产生第一同步控制信号。 参考时间电路与条件检测单元耦合，并响应于第一同步控制信号产生参考时间信号。 同步信号发生器响应于第一同步控制信号和基准时间信号产生第二同步控制信号。

公开(公告)号：US20240063110A1

公开(公告)日：2024-02-22

申请号：US18492816

申请日：2023-10-24

申请人： CHUN-MING LIN

发明人： CHUN-MING LIN

IPC分类号： H01L23/498 ,  C25D7/12 ,  H01L21/48 ,  C25D3/38 ,  H05K1/11 ,  H05K1/09

CPC分类号： H01L23/49866 ,  H01L23/49822 ,  C25D7/12 ,  H01L21/4857 ,  C25D3/38 ,  H01L23/49827 ,  H05K1/112 ,  H05K1/09 ,  H05K1/115 ,  H05K2201/0364 ,  H05K2201/095 ,  H05K2201/09509 ,  H05K1/18

摘要： The present disclosure provides a method for forming a multilayer wiring structure, which includes: forming a patterned copper-phosphorous alloy layer over a carrier by performing a plating operation, and forming a dielectric layer over the patterned copper-phosphorous alloy layer. The forming the patterned copper-phosphorous alloy layer includes providing a plating solution having a copper source and a phosphorous source.

公开(公告)号：US08450161B2

公开(公告)日：2013-05-28

申请号：US13465551

申请日：2012-05-07

申请人： Chien-Hao Chen ,  Hao-Ming Lien ,  Ssu-Yu Li ,  Jun-Lin Yeh ,  Kang-Cheng Lin ,  Kuo-Tai Huang ,  Chii-Horng Li ,  Chien-Liang Chen ,  Chung-Hau Fei ,  Wen-Chih Yang ,  Jin-Aun Ng ,  Chi Hsin Chang ,  Chun Ming Lin ,  Harry Chuang

发明人： Chien-Hao Chen ,  Hao-Ming Lien ,  Ssu-Yu Li ,  Jun-Lin Yeh ,  Kang-Cheng Lin ,  Kuo-Tai Huang ,  Chii-Horng Li ,  Chien-Liang Chen ,  Chung-Hau Fei ,  Wen-Chih Yang ,  Jin-Aun Ng ,  Chi Hsin Chang ,  Chun Ming Lin ,  Harry Chuang

IPC分类号： H01L21/00 ,  H01L21/02

CPC分类号： H01L21/28088 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833

摘要： The present disclosure provides a semiconductor device that includes a semiconductor substrate and a transistor formed in the substrate. The transistor includes a gate stack having a high-k dielectric and metal gate, a sealing layer formed on sidewalls of the gate stack, the sealing layer having an inner edge and an outer edge, the inner edge interfacing with the sidewall of the gate stack, a spacer formed on the outer edge of the sealing layer, and a source/drain region formed on each side of the gate stack, the source/drain region including a lightly doped source/drain (LDD) region that is aligned with the outer edge of the sealing layer.

摘要翻译： 本公开提供一种半导体器件，其包括半导体衬底和形成在衬底中的晶体管。 晶体管包括具有高k电介质和金属栅极的栅极堆叠，形成在栅极叠层的侧壁上的密封层，密封层具有内边缘和外边缘，内边缘与栅叠层的侧壁相接合 ，形成在密封层的外边缘上的隔离物和形成在栅极堆叠的每一侧上的源极/漏极区域，源极/漏极区域包括与外部电极对准的轻掺杂源极/漏极（LDD）区域 密封层的边缘。

公开(公告)号：US20130106807A1

公开(公告)日：2013-05-02

申请号：US13613045

申请日：2012-09-13

申请人： Chun-Ming Lin ,  Wen-Chung Chuang ,  Po-Fu Huang

发明人： Chun-Ming Lin ,  Wen-Chung Chuang ,  Po-Fu Huang

IPC分类号： G06F3/038

CPC分类号： H04N13/398 ,  G02B27/2214 ,  G09G3/003 ,  G09G3/36 ,  H04N13/305 ,  H04N13/361

摘要： A three-dimensional switching device includes an image switching panel, at least a first and a second driver unit, and at least a signal connection circuit. The image switching panel has a plurality of first electrodes criss-crossing with a plurality of second electrodes. The first driver unit has a first flexible circuit board with a first driver circuit disposed thereon that connects to a side of the image switching panel, and has a first output terminal electrically connected to the first electrodes. The second driver unit similarly has a second flexible circuit board having a second driver circuit connecting to the other side of the image switching panel with a second output terminal electrically connected to the second electrodes. The signal connection circuit connects to the image switching panel. The first and second driver circuits respectively have a first and second input terminal electrically connected to the signal connection circuit.

摘要翻译： 三维切换装置包括图像切换面板，至少第一和第二驱动器单元以及至少一个信号连接电路。 图像切换面板具有与多个第二电极交叉的多个第一电极。 第一驱动器单元具有第一柔性电路板，其上设置有连接到图像切换面板一侧的第一驱动电路，并且具有电连接到第一电极的第一输出端子。 第二驱动器单元类似地具有第二柔性电路板，其具有连接到图像切换面板的另一侧的第二驱动器电路，第二输出端子电连接到第二电极。 信号连接电路连接到图像切换面板。 第一和第二驱动器电路分别具有电连接到信号连接电路的第一和第二输入端子。