公开(公告)号：US20130307711A1

公开(公告)日：2013-11-21

申请号：US13983297

申请日：2012-05-29

申请人： Jianhui Wu ,  Zixuan Wang ,  Xiao Shi ,  Meng Zhang ,  Cheng Huang ,  Chao Chen ,  Fuqing Huang ,  Xincun Ji ,  Ping Jiang

发明人： Jianhui Wu ,  Zixuan Wang ,  Xiao Shi ,  Meng Zhang ,  Cheng Huang ,  Chao Chen ,  Fuqing Huang ,  Xincun Ji ,  Ping Jiang

IPC分类号： H03M1/04

CPC分类号： H03M1/04 ,  G04F10/005

摘要： A stochastic time-digital converter (STDC) including an input switching circuit, an STDC array, and an encoder. A clock circuit inputs two clock signals into two input terminals of the input switching circuit; the input switching circuit transmits the two clock signals in a cyclic cross-transposition form to two input terminals of the STDC array, and simultaneously outputs a trigger control signal to the encoder; each comparator in the STDC array independently judges the speeds of the two clock signals and sends the judgement results to the encoder for collection and processing; and the encoder outputs the size and positivity or negativity of the phase difference of the two clock signals. The technical solution utilizes the stochastic characteristic of the STDC to double the number of the equivalent comparators in the STDC array, eliminating the effects on the circuitry of device mismatching and processes, power supply voltage, and temperature.

摘要翻译： 包括输入切换电路，STDC阵列和编码器的随机时间数字转换器（STDC）。 时钟电路将两个时钟信号输入到输入开关电路的两个输入端; 输入切换电路以循环交叉形式将两个时钟信号发送到STDC阵列的两个输入端，同时向编码器输出触发控制信号; STDC阵列中的每个比较器独立地判断两个时钟信号的速度，并将判断结果发送到编码器进行采集和处理; 并且编码器输出两个时钟信号的相位差的大小和积极性或消极性。 该技术解决方案利用STDC的随机特性将STDC阵列中的等效比较器的数量加倍，从而消除了器件不匹配和处理电路，电源电压和温度的影响。

公开(公告)号：US20150278254A1

公开(公告)日：2015-10-01

申请号：US14673523

申请日：2015-03-30

申请人： Anurag Bhardwaj ,  Wei Di ,  Vignesh Jagadeesh ,  Robinson Piramuthu ,  Zixuan Wang

发明人： Anurag Bhardwaj ,  Wei Di ,  Vignesh Jagadeesh ,  Robinson Piramuthu ,  Zixuan Wang

IPC分类号： G06F17/30

CPC分类号： G06F17/30247 ,  G06F17/30244 ,  G06K9/46 ,  G06K9/52

摘要： In various example embodiments, a system and method for image query are presented. A feature detector generates first feature description data of a first type. An image processor accesses feature codes and angle bins. The image processor generates second feature description data of a second type by comparing a plurality of groups with respective codes of the feature codes. Each of the plurality of groups comprises at least of portion of the first feature description data determined based at least on the feature codes and the angle bins. A search engine selects a first one of a plurality of stored feature description data linked to respective stored images. An interface provides an indication of the stored image linked to the first stored feature description data for display of the stored image linked to the first stored feature description data on a remote device.

摘要翻译： 在各种示例实施例中，呈现用于图像查询的系统和方法。 特征检测器生成第一类型的第一特征描述数据。 图像处理器访问特征码和角度仓。 图像处理器通过将多个组与特征码的各个代码进行比较来生成第二类型的第二特征描述数据。 所述多个组中的每一个至少包括至少部分基于特征码和角度位置确定的第一特征描述数据的一部分。 搜索引擎选择与相应存储的图像相链接的多个存储的特征描述数据中的第一个。 接口提供与存储的第一个特征描述数据相关联的存储的图像的指示，用于显示与远程设备上的第一存储的特征描述数据链接的存储的图像。

公开(公告)号：US08766698B2

公开(公告)日：2014-07-01

申请号：US13978864

申请日：2011-08-18

申请人： Jianhui Wu ,  Chao Chen ,  Hong Li ,  Longxing Shi ,  Zixuan Wang ,  Jie Sun ,  Zhiyi Ye ,  Meng Zhang

发明人： Jianhui Wu ,  Chao Chen ,  Hong Li ,  Longxing Shi ,  Zixuan Wang ,  Jie Sun ,  Zhiyi Ye ,  Meng Zhang

IPC分类号： G06G7/12 ,  G06F7/44

CPC分类号： H03D7/1425

摘要： A return-type current-reuse mixer having a transconductance/amplification stage, a mixing stage, and a high-pass and a low-pass filter network. The transconductance/amplification stage has a current-reuse CMOS topology wherein an input frequency signal is converted into a frequency current, low-frequency components are removed from the frequency current by the high-pass filter network, the frequency current is fed into the mixing stage, modulation occurs in the mixing stage, and then an intermediate-frequency signal is generated and output. Once high-frequency components are removed from the intermediate-frequency signal by the low-pass filter network, the intermediate-frequency signal is sent again for input into the transconductance/amplification stage, then amplified in the transconductance/amplification stage and output. The mixer transconductance/amplification stage employs a current-reuse technique. The input frequency and the output intermediate-frequency signal share a common transconductance/amplification stage. The mixer reduces power consumption, simplifies the circuit topology, and provides high conversion gain.

摘要翻译： 具有跨导/放大级，混频级以及高通和低通滤波器网络的返回型电流再利用混频器。 跨导/放大级具有电流再利用CMOS拓扑，其中输入频率信号被转换成频率电流，低频分量由高通滤波器网络从频率电流中去除，频率电流被馈送到混频 在混合阶段发生调制，然后产生并输出中频信号。 一旦通过低通滤波器网络从中频信号中去除了高频分量，则再次发送中频信号以输入到跨导/放大级，然后在跨导/放大级中放大并输出。 混频器跨导/放大级采用电流复用技术。 输入频率和输出中频信号共用一个跨导/放大级。 混频器降低了功耗，简化了电路拓扑结构，并提供了高转换增益。

公开(公告)号：US08810440B2

公开(公告)日：2014-08-19

申请号：US13983297

申请日：2012-05-29

申请人： Jianhui Wu ,  Zixuan Wang ,  Xiao Shi ,  Meng Zhang ,  Cheng Huang ,  Chao Chen ,  Fuqing Huang ,  Xincun Ji ,  Ping Jiang

发明人： Jianhui Wu ,  Zixuan Wang ,  Xiao Shi ,  Meng Zhang ,  Cheng Huang ,  Chao Chen ,  Fuqing Huang ,  Xincun Ji ,  Ping Jiang

IPC分类号： H03M1/04 ,  G04F10/00

CPC分类号： H03M1/04 ,  G04F10/005

摘要： A stochastic time-digital converter (STDC) including an input switching circuit, an STDC array, and an encoder. A clock circuit inputs two clock signals into two input terminals of the input switching circuit; the input switching circuit transmits the two clock signals in a cyclic cross-transposition form to two input terminals of the STDC array, and simultaneously outputs a trigger control signal to the encoder; each comparator in the STDC array independently judges the speeds of the two clock signals and sends the judgement results to the encoder for collection and processing; and the encoder outputs the size and positivity or negativity of the phase difference of the two clock signals. The technical solution utilizes the stochastic characteristic of the STDC to double the number of the equivalent comparators in the STDC array, eliminating the effects on the circuitry of device mismatching and processes, power supply voltage, and temperature.

摘要翻译： 包括输入切换电路，STDC阵列和编码器的随机时间数字转换器（STDC）。 时钟电路将两个时钟信号输入到输入开关电路的两个输入端; 输入切换电路以循环交叉形式将两个时钟信号发送到STDC阵列的两个输入端，同时向编码器输出触发控制信号; STDC阵列中的每个比较器独立地判断两个时钟信号的速度，并将判断结果发送到编码器进行采集和处理; 并且编码器输出两个时钟信号的相位差的大小和积极性或消极性。 该技术解决方案利用STDC的随机特性将STDC阵列中的等效比较器的数量加倍，从而消除了器件不匹配和处理电路，电源电压和温度的影响。

公开(公告)号：US20130300490A1

公开(公告)日：2013-11-14

申请号：US13978864

申请日：2011-08-18

申请人： Jianhui Wu ,  Chao Chen ,  Hong Li ,  Longxing Shi ,  Zixuan Wang ,  Jie Sun ,  Zhiyi Ye ,  Meng Zhang

发明人： Jianhui Wu ,  Chao Chen ,  Hong Li ,  Longxing Shi ,  Zixuan Wang ,  Jie Sun ,  Zhiyi Ye ,  Meng Zhang

IPC分类号： H03D7/14

CPC分类号： H03D7/1425

摘要： A return-type current-reuse mixer having a transconductance/amplification stage, a mixing stage, and a high-pass and a low-pass filter network. The transconductance/amplification stage has a current-reuse CMOS topology wherein an input frequency signal is converted into a frequency current, low-frequency components are removed from the frequency current by the high-pass filter network, the frequency current is fed into the mixing stage, modulation occurs in the mixing stage, and then an intermediate-frequency signal is generated and output. Once high-frequency components are removed from the intermediate-frequency signal by the low-pass filter network, the intermediate-frequency signal is sent again for input into the transconductance/amplification stage, then amplified in the transconductance/amplification stage and output. The mixer transconductance/amplification stage employs a current-reuse technique. The input frequency and the output intermediate-frequency signal share a common transconductance/amplification stage. The mixer reduces power consumption, simplifies the circuit topology, and provides high conversion gain.

摘要翻译： 具有跨导/放大级，混频级以及高通和低通滤波器网络的返回型电流再利用混频器。 跨导/放大级具有电流再利用CMOS拓扑，其中输入频率信号被转换成频率电流，低频分量由高通滤波器网络从频率电流中去除，频率电流被馈送到混频 在混合阶段发生调制，然后产生并输出中频信号。 一旦通过低通滤波器网络从中频信号中去除了高频分量，则再次发送中频信号以输入到跨导/放大级，然后在跨导/放大级中放大并输出。 混频器跨导/放大级采用电流复用技术。 输入频率和输出中频信号共用一个跨导/放大级。 混频器降低了功耗，简化了电路拓扑结构，并提供了高转换增益。