公开(公告)号：US6097661A

公开(公告)日：2000-08-01

申请号：US161004

申请日：1998-09-25

申请人： Roland Thewes ,  Doris Schmitt-Landsiedel ,  Paul-Werner von Basse ,  Michael Bollu ,  Ute Kollmer ,  Andreas Luck, deceased ,  by Manfred Luck, legal representative ,  by Inge Booken, legal representative

发明人： Roland Thewes ,  Doris Schmitt-Landsiedel ,  Paul-Werner von Basse ,  Michael Bollu ,  Ute Kollmer ,  Andreas Luck, deceased ,  by Manfred Luck, legal representative ,  by Inge Booken, legal representative

IPC分类号： G11C19/28 ,  G11C7/10 ,  G11C8/04 ,  G11C7/00

CPC分类号： G11C7/1018 ,  G11C8/04

摘要： In the pointer circuit, only one static memory (1) is respectively individually allocated to each output ( . . . , A.sub.n-1, A.sub.n, A.sub.n+1, . . . ), of which each respectively has a pair of mutually complementary memory terminals (Q, Q). The two terminals are in two stored logical states ("1," "0") differing from one another. A memory terminal (Q) of each memory is connected with the output allocated to this memory. The memories are controlled by clock signals. This results in advantageous surface requirement and power loss low, as well as high speed.

摘要翻译： 在指针电路中，只有一个静态存储器（1）分别分别分配给每个输出（...，An-1，An，An + 1，...），其中每个分别具有一对相互补充的存储器 端子（Q，+ E，ovs Q + EE）。 两个终端处于彼此不同的两个存储的逻辑状态（“1”，“0”）。 每个存储器的存储器端子（Q）与分配给该存储器的输出端连接。 存储器由时钟信号控制。 这导致有利的表面要求和功率损耗低以及高速度。