公开(公告)号：US10069000B2

公开(公告)日：2018-09-04

申请号：US15052460

申请日：2016-02-24

Applicant: ABB Technology AG

Inventor： Virgiliu Botan ,  Jan Vobecky ,  Karlheinz Stiegler

IPC: H01L29/744 ,  H01L29/66 ,  H01L29/74 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10

CPC classification number: H01L29/744 ,  H01L29/0638 ,  H01L29/0657 ,  H01L29/0661 ,  H01L29/0834 ,  H01L29/0839 ,  H01L29/102 ,  H01L29/1095 ,  H01L29/66363 ,  H01L29/74

Abstract: The invention relates to a bipolar non-punch-through power semiconductor device and a corresponding manufacturing method. The device comprises a semiconductor wafer and a first electrode formed on a first main side of the wafer and a second electrode formed on a second main side of the wafer opposite the first main side. The wafer comprises a pair of layers of different conductivity types, such as a drift layer of a first conductivity type, and a first layer of a second conductivity type arranged on the drift layer towards the first main side and contacting the first electrode.The wafer comprises an inner region wand an outer region surrounding the inner region. The drift layer has a thickness in the inner region greater or equal than a thickness in the outer region. A thickness of the first layer increases in a transition region between the inner region and the outer region from a thickness in the inner region to a maximum thickness in the outer region. The thickness of the first layer increases linearly over the transition region with a width of the transition region greater than 5 times a thickness of the first section of the first layer.

公开(公告)号：US20160284826A1

公开(公告)日：2016-09-29

申请号：US15052460

申请日：2016-02-24

Applicant: ABB Technology AG

Inventor： Virgiliu Botan ,  Jan Vobecky ,  Karlheinz Stiegler

IPC: H01L29/744 ,  H01L29/10 ,  H01L29/66 ,  H01L29/06

CPC classification number: H01L29/744 ,  H01L29/0638 ,  H01L29/0657 ,  H01L29/0661 ,  H01L29/0834 ,  H01L29/0839 ,  H01L29/102 ,  H01L29/1095 ,  H01L29/66363 ,  H01L29/74

Abstract: The invention relates to a bipolar non-punch-through power semiconductor device and a corresponding manufacturing method. The device comprises a semiconductor wafer and a first electrode formed on a first main side of the wafer and a second electrode formed on a second main side of the wafer opposite the first main side. The wafer comprises a pair of layers of different conductivity types, such as a drift layer of a first conductivity type, and a first layer of a second conductivity type arranged on the drift layer towards the first main side and contacting the first electrode.The wafer comprises an inner region wand an outer region surrounding the inner region. The drift layer has a thickness in the inner region greater or equal than a thickness in the outer region. A thickness of the first layer increases in a transition region between the inner region and the outer region from a thickness in the inner region to a maximum thickness in the outer region. The thickness of the first layer increases linearly over the transition region with a width of the transition region greater than 5 times a thickness of the first section of the first layer.

Abstract translation: 晶片包括内部区域和围绕内部区域的外部区域。 漂移层的内部区域的厚度大于或等于外部区域的厚度。 在内部区域和外部区域之间的过渡区域中，第一层的厚度从外部区域的内部区域的厚度增加到最大厚度。 第一层的厚度在过渡区域上线性增加，其中过渡区域的宽度大于第一层的第一部分的厚度的5倍。