公开(公告)号：US20220100504A1

公开(公告)日：2022-03-31

申请号：US17032301

申请日：2020-09-25

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC

Inventor： Benjamin TSIEN ,  Alexander J. BRANOVER ,  John PETRY ,  Chen-Ping YANG ,  Rostyslav KYRYCHYNSKYI ,  Vydhyanathan KALYANASUNDHARAM

IPC: G06F9/30 ,  G06F9/4401 ,  G06F9/38 ,  G06F9/46 ,  G06F13/40

Abstract: A processing system that includes a shared data fabric resets a first client processor while operating a second client processor. The first client processor is instructed to stop making requests to one or more devices of the shared data fabric. Status communications are blocked between the first client processor and a memory controller, the second client processor, or both, such that the first client processor enters a temporary offline state. The first client processor is indicated as being non-coherent. Accordingly, when the processor is reset some errors and efficiency losses due messages sent during or prior to the reset are prevented.

公开(公告)号：US20210191879A1

公开(公告)日：2021-06-24

申请号：US16723185

申请日：2019-12-20

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Sonu ARORA ,  Benjamin TSIEN ,  Alexander J. BRANOVER

IPC: G06F12/14 ,  G06F12/06 ,  G06F12/0877 ,  G06F9/54 ,  G06F9/30 ,  G06F9/50 ,  G06F11/30 ,  G06F12/1009 ,  G06F12/1027

Abstract: A processor in a system is responsive to a coherent memory request buffer having a plurality of entries to store coherent memory requests from a client module and a non-coherent memory request buffer having a plurality of entries to store non-coherent memory requests from the client module. The client module buffers coherent and non-coherent memory requests and releases the memory requests based on one or more conditions of the processor or one of its caches. The memory requests are released to a central data fabric and into the system based on a first watermark associated with the coherent memory buffer and a second watermark associated with the non-coherent memory buffer.