MULTI-DIE SYSTEM PERFORMANCE OPTIMIZATION

    公开(公告)号:US20210405722A1

    公开(公告)日:2021-12-30

    申请号:US17029852

    申请日:2020-09-23

    Abstract: A multi-die semiconductor package includes a first integrated circuit (IC) die having a first intrinsic performance level and a second IC die having a second intrinsic performance level different from the first intrinsic performance level. A power management controller distributes, based on a determined die performance differential between the first IC die and the second IC die, a level of power allocated to the semiconductor chip package between the first IC die and the second IC die. In this manner, the first IC die receives and operates at a first level of power resulting in performance exceeding its intrinsic performance level. The second IC die receives and operates at a second level of power resulting in performance below its intrinsic performance level, thereby reducing performance differentials between the IC dies.

    Write Endurance Management Techniques in the Logic Layer of a Stacked Memory
    2.
    发明申请
    Write Endurance Management Techniques in the Logic Layer of a Stacked Memory 有权
    在堆叠存储器的逻辑层中写入耐力管理技术

    公开(公告)号:US20140181457A1

    公开(公告)日:2014-06-26

    申请号:US13725305

    申请日:2012-12-21

    CPC classification number: G06F12/10 G06F11/1666 G06F11/2094

    Abstract: A system, method, and memory device embodying some aspects of the present invention for remapping external memory addresses and internal memory locations in stacked memory are provided. The stacked memory includes one or more memory layers configured to store data. The stacked memory also includes a logic layer connected to the memory layer. The logic layer has an Input/Output (I/O) port configured to receive read and write commands from external devices, a memory map configured to maintain an association between external memory addresses and internal memory locations, and a controller coupled to the I/O port, memory map, and memory layers, configured to store data received from external devices to internal memory locations.

    Abstract translation: 提供体现本发明的一些方面的用于重新映射外部存储器地址和堆叠存储器中的内部存储器位置的系统,方法和存储器件。 堆叠的存储器包括被配置为存储数据的一个或多个存储器层。 堆叠的存储器还包括连接到存储器层的逻辑层。 逻辑层具有被配置为从外部设备接收读取和写入命令的输入/输出(I / O)端口,被配置为保持外部存储器地址和内部存储器位置之间的关联的存储器映射以及耦合到I / O端口,内存映射和内存层,配置为将从外部设备接收的数据存储到内部存储器位置。

Patent Agency Ranking