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公开(公告)号:US20230095805A1
公开(公告)日:2023-03-30
申请号:US17487569
申请日:2021-09-28
发明人: Rajesh Mangalore Anand , Prasant Kumar Vallur , Piyush Gupta , Girish Anathahalli Singrigowda , Jagadeesh Anathahalli Singrigowda
IPC分类号: H03K19/17788 , H03K19/003 , H03K19/0185
摘要: Systems and techniques for applying voltage biases to gates of driver circuitry of an integrated circuit (IC) based on a detected bus voltage, IC supply voltage, or both are used to mitigate Electrical Over-Stress (EOS) issues in components of the driver circuitry caused, for instance, by high bus voltages in serial communication systems relative to maximum operating voltages of those components. A driver bias generator selectively applies bias voltages at gates of transistors of a stacked driver structure of an IC to prevent the voltage drop across any given transistor of the stacked driver structure from exceeding a predetermined threshold associated with the maximum operating voltage range of the transistors.
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公开(公告)号:US11764789B2
公开(公告)日:2023-09-19
申请号:US17487569
申请日:2021-09-28
发明人: Rajesh Mangalore Anand , Prasant Kumar Vallur , Piyush Gupta , Girish Anathahalli Singrigowda , Jagadeesh Anathahalli Singrigowda
IPC分类号: H03K19/17788 , H03K19/0185 , H03K19/003
CPC分类号: H03K19/17788 , H03K19/00315 , H03K19/00384 , H03K19/018507
摘要: Systems and techniques for applying voltage biases to gates of driver circuitry of an integrated circuit (IC) based on a detected bus voltage, IC supply voltage, or both are used to mitigate Electrical Over-Stress (EOS) issues in components of the driver circuitry caused, for instance, by high bus voltages in serial communication systems relative to maximum operating voltages of those components. A driver bias generator selectively applies bias voltages at gates of transistors of a stacked driver structure of an IC to prevent the voltage drop across any given transistor of the stacked driver structure from exceeding a predetermined threshold associated with the maximum operating voltage range of the transistors.
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