公开(公告)号：US20130307157A1

公开(公告)日：2013-11-21

申请号：US13953328

申请日：2013-07-29

Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.

Inventor： Po-Shing Chiang ,  Ping-Cheng Hu ,  Yu-Fang Tsai

IPC: H01L23/488

CPC classification number: H01L23/488 ,  H01L21/4832 ,  H01L21/56 ,  H01L23/49541 ,  H01L23/49582 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: Electronic devices including a semiconductor device package, a substrate, and first and second solder joints. The semiconductor device package includes a die pad, leads and enhancement elements surrounding the die pad, a chip electrically connected to the leads, and a package body encapsulating the chip, portions of the leads, and portions of the enhancement elements, but leaving exposed at least a side surface of each enhancement element. Side surfaces of the enhancement elements and the package body are coplanar. The substrate includes first pads corresponding to the leads and second pads corresponding to the enhancement elements. The first solder joints are disposed between the first pads and the leads. The second solder joints are disposed between the second pads and the enhancement elements. The second solder joints contact side surfaces of the enhancement elements. The surface area of the second pads is greater than the surface area of the corresponding enhancement elements.

Abstract translation: 包括半导体器件封装，基板以及第一和第二焊点的电子器件。 半导体器件封装包括管芯焊盘，引线和围绕芯片焊盘的增强元件，与引线电连接的芯片以及封装芯片，引线部分和增强元件的部分的封装体，但是暴露于 至少一个增强元件的侧面。 增强元件和封装主体的侧表面是共面的。 衬底包括对应于引线的第一焊盘和对应于增强元件的第二焊盘。 第一焊点设置在第一焊盘和引线之间。 第二焊点设置在第二焊盘和增强元件之间。 第二焊点接触增强元件的侧表面。 第二焊盘的表面积大于相应增强元件的表面积。

公开(公告)号：US08994156B2

公开(公告)日：2015-03-31

申请号：US13953328

申请日：2013-07-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Po-Shing Chiang ,  Ping-Cheng Hu ,  Yu-Fang Tsai

IPC: H01L23/495 ,  H01L21/00 ,  H05K5/02 ,  H01L23/488 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/488 ,  H01L21/4832 ,  H01L21/56 ,  H01L23/49541 ,  H01L23/49582 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: Electronic devices including a semiconductor device package, a substrate, and first and second solder joints. The semiconductor device package includes a die pad, leads and enhancement elements surrounding the die pad, a chip electrically connected to the leads, and a package body encapsulating the chip, portions of the leads, and portions of the enhancement elements, but leaving exposed at least a side surface of each enhancement element. Side surfaces of the enhancement elements and the package body are coplanar. The substrate includes first pads corresponding to the leads and second pads corresponding to the enhancement elements. The first solder joints are disposed between the first pads and the leads. The second solder joints are disposed between the second pads and the enhancement elements. The second solder joints contact side surfaces of the enhancement elements. The surface area of the second pads is greater than the surface area of the corresponding enhancement elements.

Abstract translation: 包括半导体器件封装，基板以及第一和第二焊点的电子器件。 半导体器件封装包括管芯焊盘，引线和围绕芯片焊盘的增强元件，与引线电连接的芯片以及封装芯片，引线部分和增强元件的部分的封装体，但是暴露于 至少一个增强元件的侧面。 增强元件和封装主体的侧表面是共面的。 衬底包括对应于引线的第一焊盘和对应于增强元件的第二焊盘。 第一焊点设置在第一焊盘和引线之间。 第二焊点设置在第二焊盘和增强元件之间。 第二焊点接触增强元件的侧表面。 第二焊盘的表面积大于相应增强元件的表面积。