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公开(公告)号：US20140117388A1
公开(公告)日：2014-05-01
申请号：US13663016
申请日：2012-10-29
Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Inventor： Yen-Ting Kuo , Ping-Cheng Hu , Yu-Fang Tsai
CPC classification number: H01L33/486 , H01L33/54 , H01L33/62 , H01L2224/48091 , H01L2224/48247 , H01L2933/0033 , H01L2924/00014
Abstract: Light-emitting semiconductor packages and related methods. The light-emitting semiconductor package includes a central barrier, a plurality of leads, a light-emitting device, a first encapsulant, a package body, and a second encapsulant. The light-emitting device is disposed in the interior space defined by the central barrier and is electrically connected to the leads surrounding the central barrier. The light-emitting device includes upper and lower light-emitting surfaces. The first encapsulant and the second encapsulant cover the upper and lower light-emitting surfaces, respectively. The package body encapsulates portions of the central barrier, portions of each of the leads, and the first encapsulant. The light-emitting semiconductor package can emit light from both the upper and lower sides thereof.
Abstract translation: 发光半导体封装及相关方法。 发光半导体封装包括中央屏障，多个引线，发光器件，第一密封剂，封装体和第二密封剂。 发光装置设置在由中央屏障限定的内部空间中，并且电连接到围绕中心屏障的引线。 发光装置包括上下发光面。 第一密封剂和第二密封剂分别覆盖上部和下部发光表面。 封装主体封装中央屏障的部分，每个引线的部分和第一密封剂。 发光半导体封装可以从其上侧和下侧发光。
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Patent Agency Ranking
公开(公告)号：US12009353B2
公开(公告)日：2024-06-11
申请号：US17719280
申请日：2022-04-12
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Tsung-Yueh Tsai , Meng-Jen Wang , Yu-Fang Tsai , Meng-Jung Chuang
IPC: H01L25/16 , H01L21/48 , H01L21/52 , H01L23/31 , H01L23/538
CPC classification number: H01L25/167 , H01L21/4817 , H01L21/52 , H01L23/3128 , H01L23/5386 , H01L23/5389 , H01L25/165
Abstract: An optical device package comprises a carrier having a first surface and a second surface recessed with respect to the first surface and a lid disposed on the second surface of the carrier.
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公开(公告)号：US08994156B2
公开(公告)日：2015-03-31
申请号：US13953328
申请日：2013-07-29
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Po-Shing Chiang , Ping-Cheng Hu , Yu-Fang Tsai
IPC: H01L23/495 , H01L21/00 , H05K5/02 , H01L23/488 , H01L23/00 , H01L21/48 , H01L21/56
CPC classification number: H01L23/488 , H01L21/4832 , H01L21/56 , H01L23/49541 , H01L23/49582 , H01L24/48 , H01L24/49 , H01L2224/48091 , H01L2224/48247 , H01L2224/49 , H01L2924/00014 , H01L2924/181 , H01L2224/45099 , H01L2924/00012
Abstract: Electronic devices including a semiconductor device package, a substrate, and first and second solder joints. The semiconductor device package includes a die pad, leads and enhancement elements surrounding the die pad, a chip electrically connected to the leads, and a package body encapsulating the chip, portions of the leads, and portions of the enhancement elements, but leaving exposed at least a side surface of each enhancement element. Side surfaces of the enhancement elements and the package body are coplanar. The substrate includes first pads corresponding to the leads and second pads corresponding to the enhancement elements. The first solder joints are disposed between the first pads and the leads. The second solder joints are disposed between the second pads and the enhancement elements. The second solder joints contact side surfaces of the enhancement elements. The surface area of the second pads is greater than the surface area of the corresponding enhancement elements.
Abstract translation: 包括半导体器件封装，基板以及第一和第二焊点的电子器件。 半导体器件封装包括管芯焊盘，引线和围绕芯片焊盘的增强元件，与引线电连接的芯片以及封装芯片，引线部分和增强元件的部分的封装体，但是暴露于 至少一个增强元件的侧面。 增强元件和封装主体的侧表面是共面的。 衬底包括对应于引线的第一焊盘和对应于增强元件的第二焊盘。 第一焊点设置在第一焊盘和引线之间。 第二焊点设置在第二焊盘和增强元件之间。 第二焊点接触增强元件的侧表面。 第二焊盘的表面积大于相应增强元件的表面积。
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公开(公告)号：US11302682B2
公开(公告)日：2022-04-12
申请号：US16664652
申请日：2019-10-25
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Tsung-Yueh Tsai , Meng-Jen Wang , Yu-Fang Tsai , Meng-Jung Chuang
IPC: H01L25/16 , H01L23/31 , H01L21/52 , H01L23/538 , H01L21/48
Abstract: An optical device package comprises a carrier having a first surface and a second surface recessed with respect to the first surface and a lid disposed on the second surface of the carrier.
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公开(公告)号：US09059379B2
公开(公告)日：2015-06-16
申请号：US13663016
申请日：2012-10-29
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Yen-Ting Kuo , Ping-Cheng Hu , Yu-Fang Tsai
CPC classification number: H01L33/486 , H01L33/54 , H01L33/62 , H01L2224/48091 , H01L2224/48247 , H01L2933/0033 , H01L2924/00014
Abstract: Light-emitting semiconductor packages and related methods. The light-emitting semiconductor package includes a central barrier, a plurality of leads, a light-emitting device, a first encapsulant, a package body, and a second encapsulant. The light-emitting device is disposed in the interior space defined by the central barrier and is electrically connected to the leads surrounding the central barrier. The light-emitting device includes upper and lower light-emitting surfaces. The first encapsulant and the second encapsulant cover the upper and lower light-emitting surfaces, respectively. The package body encapsulates portions of the central barrier, portions of each of the leads, and the first encapsulant. The light-emitting semiconductor package can emit light from both the upper and lower sides thereof.
Abstract translation: 发光半导体封装及相关方法。 发光半导体封装包括中央屏障，多个引线，发光器件，第一密封剂，封装体和第二密封剂。 发光装置设置在由中央屏障限定的内部空间中，并且电连接到围绕中心屏障的引线。 发光装置包括上下发光面。 第一密封剂和第二密封剂分别覆盖上部和下部发光表面。 封装主体封装中央屏障的部分，每个引线的部分和第一密封剂。 发光半导体封装可以从其上侧和下侧发光。
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6.发明申请SEMICONDUCTOR DEVICE PACKAGES WITH SOLDER JOINT ENHANCEMENT ELEMENT AND RELATED METHODS 审中-公开具有焊接点增强元件的半导体器件封装及相关方法公开(公告)号：US20130307157A1
公开(公告)日：2013-11-21
申请号：US13953328
申请日：2013-07-29
Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Inventor： Po-Shing Chiang , Ping-Cheng Hu , Yu-Fang Tsai
IPC: H01L23/488
CPC classification number: H01L23/488 , H01L21/4832 , H01L21/56 , H01L23/49541 , H01L23/49582 , H01L24/48 , H01L24/49 , H01L2224/48091 , H01L2224/48247 , H01L2224/49 , H01L2924/00014 , H01L2924/181 , H01L2224/45099 , H01L2924/00012
Abstract: Electronic devices including a semiconductor device package, a substrate, and first and second solder joints. The semiconductor device package includes a die pad, leads and enhancement elements surrounding the die pad, a chip electrically connected to the leads, and a package body encapsulating the chip, portions of the leads, and portions of the enhancement elements, but leaving exposed at least a side surface of each enhancement element. Side surfaces of the enhancement elements and the package body are coplanar. The substrate includes first pads corresponding to the leads and second pads corresponding to the enhancement elements. The first solder joints are disposed between the first pads and the leads. The second solder joints are disposed between the second pads and the enhancement elements. The second solder joints contact side surfaces of the enhancement elements. The surface area of the second pads is greater than the surface area of the corresponding enhancement elements.
Abstract translation: 包括半导体器件封装，基板以及第一和第二焊点的电子器件。 半导体器件封装包括管芯焊盘，引线和围绕芯片焊盘的增强元件，与引线电连接的芯片以及封装芯片，引线部分和增强元件的部分的封装体，但是暴露于 至少一个增强元件的侧面。 增强元件和封装主体的侧表面是共面的。 衬底包括对应于引线的第一焊盘和对应于增强元件的第二焊盘。 第一焊点设置在第一焊盘和引线之间。 第二焊点设置在第二焊盘和增强元件之间。 第二焊点接触增强元件的侧表面。 第二焊盘的表面积大于相应增强元件的表面积。
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