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    FREQUENCY SYNTHESIZER WITH DYNAMIC PHASE AND PULSE-WIDTH CONTROL
    1.
    发明申请
    FREQUENCY SYNTHESIZER WITH DYNAMIC PHASE AND PULSE-WIDTH CONTROL 有权
    具有动态相位和脉冲宽度控制的频率合成器

    公开(公告)号：US20160277030A1

    公开(公告)日：2016-09-22

    申请号：US14741984

    申请日：2015-06-17

    申请人： ANALOG DEVICES, INC.

    发明人： Oscar Sebastian Burbano ,  Matthew D. McShea ,  Peter Derounian ,  Reuben P. Nelson ,  Ziwei Zheng ,  Brad P. Jeffries

    IPC分类号： H03K23/40 ,  H03L7/06

    CPC分类号： H03K23/40 ,  G06F1/022 ,  H03K21/00 ,  H03K21/38 ,  H03K23/00 ,  H03K23/58 ,  H03K23/662 ,  H03K23/665

    摘要： An agile frequency synthesizer with dynamic phase and pulse-width control is disclosed. In one aspect, the frequency synthesizer includes a count circuit configured to modify a stored count value by an adjustment value. The frequency synthesizer also includes an output clock generator configured to generate an output clock signal having rising and falling edges that are based at least in part on the stored count value satisfying a count threshold. The count circuit is further configured to alter at least one of the period or phase of the output clock signal based at least in part on modifying an adjustment rate of the count circuit.

    摘要翻译： 公开了一种具有动态相位和脉冲宽度控制的敏捷频率合成器。 一方面，频率合成器包括：计数电路，被配置为通过调整值来修改存储的计数值。 频率合成器还包括输出时钟发生器，其被配置为产生具有上升沿和下降沿的输出时钟信号，所述上升沿和下降沿至少部分地基于满足计数阈值的所存储的计数值。 计数电路还被配置为至少部分地改变计数电路的调整速率来改变输出时钟信号的周期或相位中的至少一个。