公开(公告)号：US20150236662A1

公开(公告)日：2015-08-20

申请号：US14184555

申请日：2014-02-19

Applicant: ANALOG DEVICES GLOBAL

Inventor： Jinhua Ni ,  Dan Li

IPC: H03F3/45

CPC classification number: H03F3/45479 ,  H03F3/187 ,  H03F3/2173 ,  H03F3/45475 ,  H03F3/45932 ,  H03F3/45991 ,  H03F2200/129 ,  H03F2203/45112 ,  H03F2203/45528

Abstract: In certain applications, differential amplifiers with infinite common mode rejection ratios are desirable. However, resistance mismatches due to imperfections in the manufacturing create finite common mode rejection ratio in differential amplifiers degrading their performance. Disclosed are apparatus and method for improving the common mode rejection ratio of practical differential amplifiers.

Abstract translation: 在某些应用中，具有无限共模抑制比的差分放大器是理想的。 然而，由于制造过程中的缺陷导致的电阻不匹配会导致差分放大器中的有限共模抑制比降低其性能。 公开了用于提高实际差分放大器的共模抑制比的装置和方法。

公开(公告)号：US09960760B2

公开(公告)日：2018-05-01

申请号：US14063636

申请日：2013-10-25

Applicant: Analog Devices Global

Inventor： Dan Li

IPC: H03K17/00 ,  H03K17/081 ,  H03F1/22

CPC classification number: H03K17/08104 ,  H03F1/223 ,  Y10T307/696

Abstract: A power stage to generate an output voltage at one of a high reference voltage, an intermediate reference voltage and a low reference voltage, including a first switch stage connecting the output terminal to the high reference voltage, comprising a pair of transistors connected in series along their source-to-drain paths, a first transistor coupled to the output terminal and having its gate biased at the intermediate voltage, a second transistor having a gate that receives a first stage control signal that varies between the high reference voltage and the intermediate reference voltage, a second switch stage connecting the output terminal to the intermediate reference voltage, having a gate that receives a second stage control signal that varies among the high reference voltage, intermediate reference voltage and low reference voltage, a third switch stage connecting the output terminal to the low reference voltage, having a pair of transistors connected in series along their source-to-drain paths, a first transistor coupled to the output terminal and having its gate biased at the intermediate voltage, a second transistor having a gate that receives a third stage control signal that varies between the intermediate reference voltage and the low reference voltage.

公开(公告)号：US09264002B2

公开(公告)日：2016-02-16

申请号：US14184555

申请日：2014-02-19

Applicant: ANALOG DEVICES GLOBAL

Inventor： Jinhua Ni ,  Dan Li

IPC: H03F3/45

CPC classification number: H03F3/45479 ,  H03F3/187 ,  H03F3/2173 ,  H03F3/45475 ,  H03F3/45932 ,  H03F3/45991 ,  H03F2200/129 ,  H03F2203/45112 ,  H03F2203/45528

Abstract: In certain applications, differential amplifiers with infinite common mode rejection ratios are desirable. However, resistance mismatches due to imperfections in the manufacturing create finite common mode rejection ratio in differential amplifiers degrading their performance. Disclosed are apparatus and method for improving the common mode rejection ratio of practical differential amplifiers.

Abstract translation: 在某些应用中，具有无限共模抑制比的差分放大器是理想的。 然而，由于制造过程中的缺陷导致的电阻不匹配会导致差分放大器中的有限共模抑制比降低其性能。 公开了用于提高实际差分放大器的共模抑制比的装置和方法。