公开(公告)号：US20150270948A1

公开(公告)日：2015-09-24

申请号：US14218697

申请日：2014-03-18

Applicant: ANALOG DEVICES GLOBAL

Inventor： Muhammad Kalimuddin Khan ,  Philip Quinlan ,  Kenneth J. Mulvaney

IPC: H04L7/033 ,  H03L7/08 ,  H03L7/07 ,  H04L7/00

CPC classification number: H04L7/0331 ,  H03L7/07 ,  H03L7/0807 ,  H04L7/0016 ,  H04L7/046 ,  H04L7/10

Abstract: Apparatus and method for clock and data recovery are disclosed. A reset circuit counts clock cycles between edges of an input signal and resets a signal processing circuit that performs acquisition and tracking of a data stream when the clock cycle count is outside of a range. The signal processing circuit is further configured to perform acquisition and tracking according to a corrected data rate, which can be generated by data rate adjustment through a phase error correcting control loop and/or dithering between two data rates.

Abstract translation: 公开了用于时钟和数据恢复的装置和方法。 复位电路对输入信号的边沿之间的时钟周期进行计数，并且当时钟周期计数超出范围时，复位执行数据流的采集和跟踪的信号处理电路。 信号处理电路还被配置为根据校正的数据速率执行采集和跟踪，该数据速率可以通过相位误差校正控制环路的数据速率调整和/或两个数据速率之间的抖动来产生。

公开(公告)号：US09553717B2

公开(公告)日：2017-01-24

申请号：US14218697

申请日：2014-03-18

Applicant: ANALOG DEVICES GLOBAL

Inventor： Muhammad Kalimuddin Khan ,  Philip Quinlan ,  Kenneth J. Mulvaney

IPC: H04L7/033 ,  H04L7/10 ,  H03L7/07 ,  H03L7/08 ,  H04L7/00

CPC classification number: H04L7/0331 ,  H03L7/07 ,  H03L7/0807 ,  H04L7/0016 ,  H04L7/046 ,  H04L7/10

Abstract: Apparatus and method for clock and data recovery are disclosed. A reset circuit counts clock cycles between edges of an input signal and resets a signal processing circuit that performs acquisition and tracking of a data stream when the clock cycle count is outside of a range. The signal processing circuit is further configured to perform acquisition and tracking according to a corrected data rate, which can be generated by data rate adjustment through a phase error correcting control loop and/or dithering between two data rates.

Abstract translation: 公开了用于时钟和数据恢复的装置和方法。 复位电路对输入信号的边沿之间的时钟周期进行计数，并且当时钟周期计数超出范围时，复位执行数据流的采集和跟踪的信号处理电路。 信号处理电路还被配置为根据校正的数据速率执行采集和跟踪，该数据速率可以通过相位误差校正控制环路的数据速率调整和/或两个数据速率之间的抖动来产生。