Partial Pixel Oversampling for High Dynamic Range Imaging

    公开(公告)号:US20250024170A1

    公开(公告)日:2025-01-16

    申请号:US18353085

    申请日:2023-07-16

    Applicant: APPLE INC.

    Abstract: An imaging device includes a pixel-circuit and a readout circuit. The pixel-circuit includes a photodetector. The readout circuit is configured to perform a series of iterations, each iteration including (i) accumulating an electrical charge in the photodetector during an integration time, (ii) transferring a portion of the electrical charge accumulated in the photodetector to a floating diffusion, the portion being less than all the electrical charge accumulated in the photodetector, and (iii) coupling a voltage of the floating diffusion to a storage capacitance, to subsequently, in a final iteration, transfer a remaining electrical charge from the photodetector, and to derive an output digital value, indicative of a total energy of the light incident on the photodetector over the series of iterations and the final iteration, from the voltage on the storage capacitance and from the remaining electrical charge transferred in the final iteration.

    PIXEL BINNING IN AN IMAGE SENSOR
    3.
    发明申请
    PIXEL BINNING IN AN IMAGE SENSOR 有权
    PIXEL BINNING IN图像传感器

    公开(公告)号:US20150350575A1

    公开(公告)日:2015-12-03

    申请号:US14292599

    申请日:2014-05-30

    Applicant: Apple Inc.

    CPC classification number: H04N9/04511 H04N5/347 H04N5/37457 H04N9/045

    Abstract: Pixel binning is performed by summing charge from some pixels positioned diagonally in a pixel array. Pixel signals output from pixels positioned diagonally in the pixel array may be combined on the output lines. A signal representing summed charge produces a binned 2×1 cluster. A signal representing combined voltage signals produces a binned 2×1 cluster. A signal representing summed charge and a signal representing combined pixel signals can be combined digitally to produce a binned 2×2 pixel. Orthogonal binning may be performed on other pixels in the pixel array by summing charge on respective common sense regions and then then combining the voltage signals that represent the summed charge on respective output lines.

    Abstract translation: 通过对来自像素阵列中的对角定位的一些像素的电荷求和来执行像素合并。 从位于像素阵列中对角线的像素输出的像素信号可以组合在输出线上。 表示相加电荷的信号产生一个二进制的2×1簇。 表示组合电压信号的信号产生一个二进制的2×1簇。 表示合并的电荷的信号和表示组合的像素信号的信号可以数字地组合以产生二进制的2×2像素。 可以通过对相应的公共感测区域上的电荷进行相加,然后将表示相加的输出线上的相加电荷的电压信号合并,来对像素阵列中的其他像素执行正交分样。

    Image Sensor Architectures that Employ Multi-Potential Dynamic Substrate Biasing

    公开(公告)号:US20250048752A1

    公开(公告)日:2025-02-06

    申请号:US18228534

    申请日:2023-07-31

    Applicant: Apple Inc.

    Abstract: An image sensor includes a semiconductor substrate. The semiconductor substrate includes a set of one or more substrate portions. Each substrate portion of the set of one or more substrate portions is electrically isolated from other substrate portions of the set of substrate portions. The image sensor further includes a set of photodiodes, a set of charge storage nodes, a set of charge transfer gates, and a control circuit. Each charge transfer gate of the set of charge transfer gates is disposed on and biased by a different substrate portion of the set of substrate portions. Each charge transfer gate of the set of charge transfer gates is operable to selectively connect a respective photodiode of the set of photodiodes to the charge storage node. The control circuit is operable to dynamically bias each substrate portion of the set of substrate portions independently of each other substrate portion of the set of substrate portions.

    Pixel binning in an image sensor
    6.
    发明授权

    公开(公告)号:US10609348B2

    公开(公告)日:2020-03-31

    申请号:US15627409

    申请日:2017-06-19

    Applicant: Apple Inc.

    Abstract: Pixel binning is performed by summing charge from some pixels positioned diagonally in a pixel array. Pixel signals output from pixels positioned diagonally in the pixel array may be combined on the output lines. A signal representing summed charge produces a binned 2×1 cluster. A signal representing combined voltage signals produces a binned 2×1 cluster. A signal representing summed charge and a signal representing combined pixel signals can be combined digitally to produce a binned 2×2 pixel. Orthogonal binning may be performed on other pixels in the pixel array by summing charge on respective common sense regions and then combining the voltage signals that represent the summed charge on respective output lines.

    High speed, low power image sensor system

    公开(公告)号:US10951848B2

    公开(公告)日:2021-03-16

    申请号:US16272431

    申请日:2019-02-11

    Applicant: Apple Inc.

    Abstract: An image sensing system is disclosed. The image sensing system includes an array of pixel circuits and a multiplexer configured to convey an output signal from a selected one of the pixel circuits. The output signal from the selected one of the plurality of pixel circuits is converted from analog to digital by a successive approximation register (SAR) analog-to-digital converter (ADC). A control circuit is provided to cause the SAR ADC power cycling with shaped power control signal. The SAR ADC comparator pre-amp with integrate-reset causes reduced power to the theoretical limit for imaging systems. The control circuit causes quantization process of selected ones of the pixel circuits to be repeated one or more times during the processing.

    Pixel Binning in an Image Sensor
    9.
    发明申请

    公开(公告)号:US20180109742A1

    公开(公告)日:2018-04-19

    申请号:US15627409

    申请日:2017-06-19

    Applicant: Apple Inc.

    Abstract: Pixel binning is performed by summing charge from some pixels positioned diagonally in a pixel array. Pixel signals output from pixels positioned diagonally in the pixel array may be combined on the output lines. A signal representing summed charge produces a binned 2×1 cluster. A signal representing combined voltage signals produces a binned 2×1 cluster. A signal representing summed charge and a signal representing combined pixel signals can be combined digitally to produce a binned 2×2 pixel. Orthogonal binning may be performed on other pixels in the pixel array by summing charge on respective common sense regions and then combining the voltage signals that represent the summed charge on respective output lines.

    Substrate to place components for camera size reduction

    公开(公告)号:US12126884B1

    公开(公告)日:2024-10-22

    申请号:US17664352

    申请日:2022-05-20

    Applicant: Apple Inc.

    CPC classification number: H04N23/54 H04N23/52

    Abstract: A camera may include a substrate for placing components. An image sensor having a light-receiving side and an opposite non-light-receiving side may be attached to a first side of the substrate to receive light from one or more lenses of the camera to capture an image. The camera may also include one or more additional components separate and distinct from the image sensor. The additional components may be placed beneath the non-light-receiving side of the image sensor. The components may be attached to a second side of the substrate opposite the first side where the image sensor is mounted at least partially inside one or more recesses, or embedded at least partially inside the substrate.

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