公开(公告)号：US20160179373A1

公开(公告)日：2016-06-23

申请号：US14574527

申请日：2014-12-18

Applicant: APPLE INC.

Inventor： Liran Erez ,  Guy Ben-Yehuda ,  Avraham (Poza) Meir ,  Ori Isachar

IPC: G06F3/06

CPC classification number: G11C11/5628 ,  G11C7/1045 ,  G11C7/1063

Abstract: An apparatus includes a register memory and circuitry. The register memory is configured to hold a minimal value specified for a performance measure of a given type of memory access commands, whose actual performance measures vary among memory devices. The circuitry is configured to receive a memory access command of the given type, to execute the received memory access command in one or more memory devices, and to acknowledge the memory access command not before reaching the minimal value stored in the register memory.

Abstract translation: 一种装置包括寄存器存储器和电路。 寄存器存储器被配置为保持为给定类型的存储器访问命令的性能测量指定的最小值，其实际性能测量在存储器设备之间变化。 电路被配置为接收给定类型的存储器访问命令，以在一个或多个存储器设备中执行接收的存储器访问命令，并且在达到存储在寄存器存储器中的最小值之前确认存储器访问命令。

公开(公告)号：US20160147444A1

公开(公告)日：2016-05-26

申请号：US14551016

申请日：2014-11-23

Applicant: Apple Inc.

Inventor： Moshe Neerman ,  Etai Zaltsman ,  Avraham (Poza) Meir

IPC: G06F3/06

CPC classification number: G06F3/061 ,  G06F3/064 ,  G06F3/0644 ,  G06F3/0653 ,  G06F3/0659 ,  G06F3/0679 ,  G06F3/0688

Abstract: A method for data storage includes, in a memory that includes multiple memory blocks, assessing a performance characteristic of the multiple memory blocks. At least some of the memory blocks are grouped into groups using a grouping criterion that groups together the memory blocks based on similarity in the assessed performance characteristic. Data is stored in the memory by applying parallel memory access operations in the groups of the memory blocks.

Abstract translation: 一种用于数据存储的方法包括在包括多个存储块的存储器中，评估多个存储器块的性能特性。 基于评估的性能特征的相似性，使用分组标准将至少一些存储器块分组成组。 通过在存储器块的组中应用并行存储器访问操作来将数据存储在存储器中。

公开(公告)号：US09858990B2

公开(公告)日：2018-01-02

申请号：US14574527

申请日：2014-12-18

Applicant: APPLE INC.

Inventor： Liran Erez ,  Guy Ben-Yehuda ,  Avraham (Poza) Meir ,  Ori Isachar

IPC: G11C11/56 ,  G11C7/10

CPC classification number: G11C11/5628 ,  G11C7/1045 ,  G11C7/1063

Abstract: An apparatus includes a register memory and circuitry. The register memory is configured to hold a minimal value specified for a performance measure of a given type of memory access commands, whose actual performance measures vary among memory devices. The circuitry is configured to receive a memory access command of the given type, to execute the received memory access command in one or more memory devices, and to acknowledge the memory access command not before reaching the minimal value stored in the register memory.