公开(公告)号：US09105112B2

公开(公告)日：2015-08-11

申请号：US13773522

申请日：2013-02-21

Applicant: Apple Inc.

Inventor： Peter Holland ,  Hao Chen ,  Albert Kuo

IPC: G06T3/40 ,  G06T1/60 ,  G06F1/32

CPC classification number: G06T1/60 ,  G06F1/3228 ,  G06F1/3265 ,  G06F1/3287 ,  G06T3/4007 ,  G09G5/363 ,  G09G5/391 ,  G09G5/395 ,  G09G5/399 ,  G09G2330/021 ,  G09G2340/0407 ,  G09G2340/045 ,  G09G2360/127 ,  Y02D10/153 ,  Y02D10/171 ,  Y02D50/20

Abstract: Techniques are disclosed relating to power management within an integrated circuit. In one embodiment, a display buffer receives image data through a data transfer interconnect. A data transfer interconnect is powered down based on the received image data being greater than a threshold amount of data. The display buffer transmits at least a portion of the image data to one or more outputs, and in response to the transmitting, the data transfer interconnect is powered up. In some embodiments, the display buffer includes a plurality of line buffers, each configured to store a respective image source line. In such an embodiment, a display pipe configured to render images to be displayed includes the display buffer, and the powering down is performed in response to the received image data including two or more image source lines.

Abstract translation: 公开了与集成电路内的电源管理有关的技术。 在一个实施例中，显示缓冲器通过数据传输互连接收图像数据。 基于接收到的图像数据大于阈值数据量，数据传输互连被断电。 显示缓冲器将图像数据的至少一部分发送到一个或多个输出，并且响应于发送，数据传输互连被加电。 在一些实施例中，显示缓冲器包括多个行缓冲器，每个行缓冲器被配置为存储相应的图像源线。 在这样的实施例中，被配置为使得要显示的图像的显示管道包括显示缓冲器，并且响应于包括两个或更多个图像源线的接收图像数据执行掉电。

公开(公告)号：US20140232731A1

公开(公告)日：2014-08-21

申请号：US13773522

申请日：2013-02-21

Applicant: APPLE INC.

Inventor： Peter Holland ,  Hao Chen ,  Albert Kuo

IPC: G06T1/60

CPC classification number: G06T1/60 ,  G06F1/3228 ,  G06F1/3265 ,  G06F1/3287 ,  G06T3/4007 ,  G09G5/363 ,  G09G5/391 ,  G09G5/395 ,  G09G5/399 ,  G09G2330/021 ,  G09G2340/0407 ,  G09G2340/045 ,  G09G2360/127 ,  Y02D10/153 ,  Y02D10/171 ,  Y02D50/20

Abstract: Techniques are disclosed relating to power management within an integrated circuit. In one embodiment, a display buffer receives image data through a data transfer interconnect. A data transfer interconnect is powered down based on the received image data being greater than a threshold amount of data. The display buffer transmits at least a portion of the image data to one or more outputs, and in response to the transmitting, the data transfer interconnect is powered up. In some embodiments, the display buffer includes a plurality of line buffers, each configured to store a respective image source line. In such an embodiment, a display pipe configured to render images to be displayed includes the display buffer, and the powering down is performed in response to the received image data including two or more image source lines.

Abstract translation: 公开了与集成电路内的电源管理有关的技术。 在一个实施例中，显示缓冲器通过数据传输互连接收图像数据。 基于接收到的图像数据大于阈值数据量，数据传输互连被断电。 显示缓冲器将图像数据的至少一部分发送到一个或多个输出，并且响应于发送，数据传输互连被加电。 在一些实施例中，显示缓冲器包括多个行缓冲器，每个行缓冲器被配置为存储相应的图像源线。 在这样的实施例中，被配置为使得要显示的图像的显示管道包括显示缓冲器，并且响应于包括两个或更多个图像源线的接收图像数据执行掉电。