公开(公告)号：US11817312B2

公开(公告)日：2023-11-14

申请号：US16173988

申请日：2018-10-29

Applicant: APPLIED MATERIALS, INC.

Inventor： Akhil Mehrotra ,  Vinay Shankar Vidyarthi ,  Daksh Agarwal ,  Samaneh Sadighi ,  Jason Kenney ,  Rajinder Dhindsa

IPC: H01L21/02 ,  H01L21/3065 ,  H01J37/32 ,  H01L21/67 ,  H01L21/66 ,  H01L21/308

CPC classification number: H01L21/02274 ,  H01J37/32146 ,  H01L21/0228 ,  H01L21/308 ,  H01L21/3065 ,  H01L21/67069 ,  H01L22/26

Abstract: A method, apparatus and system for processing a wafer in a plasma chamber system, which includes at least a plasma generating element and a biasing electrode, include generating a plasma in the plasma chamber system by applying a source RF source power to the plasma generating element for a first period of time of a pulse period of the RF source power, after the expiration of the first period of time, removing the source RF source power, after a delay after the removal of the RF source power, applying an RF bias signal to the biasing electrode for a second period of time to bias the generated plasma towards the wafer, and after the expiration of the second period of time, removing the RF bias signal from the biasing electrode before a next pulse period of the RF source power. The generated plasma biased toward the wafer is used to process the wafer.