公开(公告)号：US20160154655A1

公开(公告)日：2016-06-02

申请号：US15017886

申请日：2016-02-08

Applicant: ARM Limited

Inventor： John David MERSH

IPC: G06F9/44 ,  G06F1/26

CPC classification number: G06F9/4401 ,  G06F1/26 ,  G06F9/4405 ,  G06F9/4418 ,  G06F11/1417 ,  G06F15/177 ,  G06F21/575 ,  G06F2221/034

Abstract: A data processing apparatus formed on an integrated circuit comprising: a plurality of processors; power control circuitry configured to control power up and power down of the processors; a read only memory for storing boot up software for booting up each of the processors. The power control circuitry is configured to respond to receipt of a check state request, to control one of the processors that is currently powered down to power up and to access the boot up software. The boot up software accessed in response to the check state request controls the processor to perform a measurement indicative of a current state of the data processing apparatus and to output a value indicative of the measurement.

Abstract translation: 一种形成在集成电路上的数据处理装置，包括：多个处理器; 功率控制电路，被配置为控制处理器的上电和掉电; 用于存储用于引导每个处理器的引导软件的只读存储器。 功率控制电路被配置为响应接收到检查状态请求，以控制当前关闭电源的处理器之一上电并访问引导软件。 响应于检查状态请求访问的引导软件控制处理器执行指示数据处理设备的当前状态的测量并输出指示测量的值。

公开(公告)号：US20160098555A1

公开(公告)日：2016-04-07

申请号：US14504815

申请日：2014-10-02

Applicant: ARM LIMITED

Inventor： John David MERSH ,  Stuart David BILES

IPC: G06F21/51 ,  H04L9/32 ,  G06F21/57

CPC classification number: G06F21/51 ,  G06F21/57 ,  G06F21/575 ,  G06F2221/033 ,  H04L9/3236 ,  H04L9/3247

Abstract: Program code attestation circuitry and a method of operating such circuitry are provided. The program code attestation circuitry includes first storage, and measurement value generation circuitry that is arranged to store within that first storage a measurement value that is determined by applying a first hash algorithm to input data determined from a code block of the program code. Within a second storage a private key is stored. Further, signature generator circuitry is responsive to an attestation request from a request source external to the program code attestation circuitry to apply, to a derived value derived from the measurement value, a signature algorithm using the private key, in order to generate a signature for output to the request source. From this signature, the request source can then derive information about the stored measurement value sufficient to enable it to ascertain whether that stored measurement value agrees with an expected measurement value for the code block in question. This provides a simple and secure mechanism for attesting as to the correctness of code blocks of program code within a data processing apparatus.

Abstract translation: 提供了程序代码证明电路和操作这种电路的方法。 程序代码认证电路包括第一存储器和测量值生成电路，其被布置为在该第一存储器内存储通过将第一散列算法应用于从程序代码的代码块确定的输入数据而确定的测量值。 在第二个存储器中存储私钥。 此外，签名生成器电路响应来自程序代码认证电路外部的请求源的认证请求，以将从测量值导出的导出值应用于使用私钥的签名算法，以便生成用于 输出到请求源。 根据该签名，请求源可以导出关于所存储的测量值的信息，足以使其能够确定所存储的测量值是否与所讨论的代码块的预期测量值一致。 这提供了一种用于证明数据处理装置内的程序代码块的正确性的简单和安全的机制。

公开(公告)号：US20200150973A1

公开(公告)日：2020-05-14

申请号：US16740595

申请日：2020-01-13

Applicant: ARM Limited

Inventor： John David MERSH

IPC: G06F9/4401 ,  G06F1/26 ,  G06F21/57

Abstract: A data processing apparatus formed on an integrated circuit comprising: a plurality of processors; power control circuitry configured to control power up and power down of the processors; a read only memory for storing boot up software for booting up each of the processors. The power control circuitry is configured to respond to receipt of a check state request, to control one of the processors that is currently powered down to power up and to access the boot up software. The boot up software accessed in response to the check state request controls the processor to perform a measurement indicative of a current state of the data processing apparatus and to output a value indicative of the measurement.

公开(公告)号：US20180314530A2

公开(公告)日：2018-11-01

申请号：US15848559

申请日：2017-12-20

Applicant: ARM Limited

Inventor： John David MERSH

IPC: G06F9/4401 ,  G06F1/26

CPC classification number: G06F9/4401 ,  G06F1/26 ,  G06F9/4405 ,  G06F9/4418 ,  G06F11/1417 ,  G06F15/177 ,  G06F21/575 ,  G06F2221/034

Abstract: A data processing apparatus formed on an integrated circuit comprising: a plurality of processors; power control circuitry configured to control power up and power down of the processors; a read only memory for storing boot up software for booting up each of the processors. The power control circuitry is configured to respond to receipt of a check state request, to control one of the processors that is currently powered down to power up and to access the boot up software. The boot up software accessed in response to the check state request controls the processor to perform a measurement indicative of a current state of the data processing apparatus and to output a value indicative of the measurement.

公开(公告)号：US20180113715A1

公开(公告)日：2018-04-26

申请号：US15848559

申请日：2017-12-20

Applicant: ARM Limited

Inventor： John David MERSH

IPC: G06F9/4401 ,  G06F1/26

Abstract: A data processing apparatus formed on an integrated circuit comprising: a plurality of processors; power control circuitry configured to control power up and power down of the processors; a read only memory for storing boot up software for booting up each of the processors. The power control circuitry is configured to respond to receipt of a check state request, to control one of the processors that is currently powered down to power up and to access the boot up software. The boot up software accessed in response to the check state request controls the processor to perform a measurement indicative of a current state of the data processing apparatus and to output a value indicative of the measurement.

公开(公告)号：US20140372738A1

公开(公告)日：2014-12-18

申请号：US13915897

申请日：2013-06-12

Applicant: ARM Limited

Inventor： John David MERSH

IPC: G06F21/57 ,  G06F1/26

CPC classification number: G06F9/4401 ,  G06F1/26 ,  G06F9/4405 ,  G06F9/4418 ,  G06F11/1417 ,  G06F15/177 ,  G06F21/575 ,  G06F2221/034

Abstract: A data processing apparatus formed on an integrated circuit comprising: a plurality of processors; power control circuitry configured to control power up and power down of the processors; a read only memory for storing boot up software for booting up each of the processors. The power control circuitry is configured to respond to receipt of a check state request, to control one of the processors that is currently powered down to power up and to access the boot up software. The boot up software accessed in response to the check state request controls the processor to perform a measurement indicative of a current state of the data processing apparatus and to output a value indicative of the measurement.

Abstract translation: 一种形成在集成电路上的数据处理装置，包括：多个处理器; 功率控制电路，被配置为控制处理器的上电和掉电; 用于存储用于引导每个处理器的引导软件的只读存储器。 功率控制电路被配置为响应接收到检查状态请求，以控制当前关闭电源的处理器之一上电并访问引导软件。 响应于检查状态请求访问的引导软件控制处理器执行指示数据处理设备的当前状态的测量并输出指示测量的值。