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公开(公告)号：US11561882B2
公开(公告)日：2023-01-24
申请号：US16332130
申请日：2017-08-09
Applicant: ARM LIMITED
Inventor： François Christopher Jacques Botman , Thomas Christopher Grocutt , John Michael Horley , Michael John Williams , Michael John Gibbs
Abstract: An apparatus and method are provided for generating and processing a trace stream indicative of instruction execution by processing circuitry. An apparatus has an input interface for receiving instruction execution information from the processing circuitry indicative of a sequence of instructions executed by the processing circuitry, and trace generation circuitry for generating from the instruction execution information a trace stream comprising a plurality of trace elements indicative of execution by the processing circuitry of instruction flow changing instructions within the sequence. The sequence may include a branch behaviour setting instruction that indicates an identified instruction within the sequence, where execution of the branch behaviour setting instruction enables a branch behaviour to be associated with the identified instruction that causes the processing circuitry to branch to a target address identified by the branch behaviour setting instruction when the identified instruction is encountered in the sequence. The trace generation circuitry is further arranged to generate, from the instruction execution information, a trace element indicative of execution behaviour of the branch behaviour setting instruction, and a trace element to indicate that the branch behaviour has been triggered on encountering the identified instruction within the sequence. This enables a very efficient form of trace stream to be used even in situations where the instruction sequence executed by the processing circuitry includes such branch behaviour setting instructions.
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公开(公告)号：US11068270B2
公开(公告)日：2021-07-20
申请号：US16309620
申请日：2016-09-13
Applicant: ARM LIMITED
Inventor： Michael John Gibbs , John Michael Horley
Abstract: An apparatus has an input interface for receiving instruction execution information from processing circuitry, and trace generation circuitry for generating from the instruction execution information a trace stream. The instruction sequence from the processing circuitry includes at least one branch-future instruction that effectively turns an instruction identified by the branch-future instruction into a branch, and in particular causes the processing circuitry to branch to a target address identified by the branch-future instruction when that identified instruction is encountered within the instruction sequence. A branch control cache is used to store branch control information derived from the branch-future instruction, and the trace generation circuitry is arranged to detect, based on that branch control information, when the identified instruction has been encountered by the processing circuitry, and upon such detection to then issue within the trace stream a trace element to indicate that a branch to the target address has occurred.
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Patent Agency Ranking
公开(公告)号：US10540309B2
公开(公告)日：2020-01-21
申请号：US15479556
申请日：2017-04-05
Applicant: ARM Limited
Inventor： Michael John Gibbs
IPC: G06F13/362 , G06F13/40 , G05B19/042
Abstract: An apparatus for combining trace data from a plurality of trace sources has an input interface to receive the trace data, and an output interface to output a trace stream. A network of interconnected funnel elements combines the trace data to produce the trace stream. Each funnel element has an output port and a plurality of input ports arranged to receive trace data either from one of the trace sources, or from an output port of another funnel element in the network, and associated control circuitry to control connection of the input ports to the output port. The control circuitry determines control data indicative of a number of trace sources whose trace data is to be routed through each of the input ports of said funnel element, and controls the timing allocation of the associated funnel element's output port to each input port in dependence on the control data.
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公开(公告)号：US11048609B2
公开(公告)日：2021-06-29
申请号：US16645584
申请日：2018-12-10
Applicant: Arm Limited
Inventor： Michael John Gibbs
Abstract: A trace module has monitoring circuitry for monitoring processing of instructions by processing circuitry, and trace output circuitry for outputting a sequence of elements indicative of outcomes of the processing of instructions by the processing circuitry. The trace module supports output of a commit window move element indicating that a commit window, representing a portion of the trace stream comprising at least one speculative element representing at least one speculatively executed instruction, should move while the oldest remaining speculative element of the trace stream remains uncommitted. This can be useful for tracing of transactional memory functionality within program code.
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公开(公告)号：US10379989B2
公开(公告)日：2019-08-13
申请号：US13968991
申请日：2013-08-16
Applicant: ARM Limited
Inventor： John Michael Horley , Simon John Craske , Michael John Gibbs , Paul Anthony Gilkerson
Abstract: A processing circuit is responsive to at least one conditional instruction to perform a conditional operation in dependence on a current value of a subset of at least one condition flag. A trace circuit is provided for generating trace data elements indicative of operations performed by the processing circuit. When the processing circuit 4 processes at least one selected instruction, then the trace circuit generates a trace data element including a traced condition value indicating at least the subset of condition flags required to determine the outcome of the conditional instruction. A corresponding diagnostic apparatus uses the traced condition value to determine a processing outcome of the at least one conditional instruction.
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公开(公告)号：US09378113B2
公开(公告)日：2016-06-28
申请号：US14104382
申请日：2013-12-12
Applicant: ARM Limited
Inventor： Paul Anthony Gilkerson , John Michael Horley , Michael John Gibbs
CPC classification number: G06F11/3495 , G06F9/30072 , G06F9/30094 , G06F9/30101 , G06F9/30123 , G06F9/30145 , G06F11/348
Abstract: A trace unit, diagnostic apparatus and data processing apparatus are provided for tracing of conditional instructions. The data processing apparatus generates instruction observed indicators indicating execution of conditional instructions and result output indicators indicating output by the data processing apparatus of results of executing respective conditional instructions. The instruction observed indicators and result output indicators are received by a trace unit that is configured to output conditional instruction trace data items and independently output conditional result trace data items enabling separate trace analysis of conditional instructions and corresponding conditional results by a diagnostic apparatus. The instruction observed indicator is received at the trace unit in a first processing cycle of the data processing apparatus while result output indicator is received at in a second different processing cycle.
Abstract translation: 提供跟踪单元，诊断装置和数据处理装置用于跟踪条件指令。 数据处理装置产生指示执行条件指令的指示观察指示，以及指示数据处理装置执行各条件指令的结果的结果输出指示符。 指令观察指标和结果输出指示器被配置为输出条件指令跟踪数据项的跟踪单元接收，并独立地输出条件结果跟踪数据项，从而能够通过诊断设备对条件指令和相应的条件结果进行单独的跟踪分析。 在数据处理装置的第一处理周期中，在跟踪单元处接收指示观察指示符，而在第二不同处理周期接收结果输出指示符。
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公开(公告)号：US09348688B2
公开(公告)日：2016-05-24
申请号：US14185121
申请日：2014-02-20
Applicant: ARM LIMITED
Inventor： John Michael Horley , Paul Anthony Gilkerson , Michael John Gibbs
CPC classification number: G06F11/079 , G06F11/3024 , G06F11/3466 , G06F11/348 , G06F11/364 , G06F11/3664
Abstract: A data processing apparatus is provided with trace circuitry for generating a plurality of trace streams including an instruction trace stream 10 and a data trace stream 12. The instruction elements within the instruction trace stream and the data elements within the data trace stream are marked with key values KV such that a match may be made between data elements and corresponding instruction elements. When predetermined conditions are met, synchronization markers 66 are inserted in both the instruction trace stream 10 and the data trace stream 12 in order to permit a precise correlation to be made between the instruction elements and the data elements when the data is subsequently analyzed.
Abstract translation: 数据处理装置具有跟踪电路，用于产生包括指令跟踪流10和数据跟踪流12的多个跟踪流。指令跟踪流内的指令元素和数据跟踪流内的数据元素用键标记 值KV，使得可以在数据元素和对应的指令元素之间进行匹配。 当满足预定条件时，同步标记66插入指令跟踪流10和数据跟踪流12两者中，以便在随后分析数据时允许在指令元素和数据元素之间进行精确的相关。
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