公开(公告)号：US20230304800A1

公开(公告)日：2023-09-28

申请号：US17705796

申请日：2022-03-28

Applicant: Arm Limited

Inventor： Remy POTTIER ,  Simon Roger HOLLAND ,  Eric VAN HENSBERGEN ,  Christopher Daniel EMMONS

IPC: G01C21/16 ,  G06N20/20 ,  B60W60/00 ,  G06V20/52 ,  G01C21/00

CPC classification number: G01C21/16 ,  G06N20/20 ,  B60W60/0017 ,  G06V20/52 ,  G01C21/3848 ,  G01C21/3885

Abstract: The present disclosure relates to a method of augmenting human perception of the surroundings, comprising: receiving a first set of data from a user device associated with the user, the first set of data comprising at least location information; receiving a second set of data from a local distributed database associated with the location information, the second set of data comprising a position of one or more entities; constructing a digital model representing the user and the one or more entities using the first and second set of data; projecting a respective course for the user and for the or each entity by inputting the digital model into a first machine learning algorithm (MLA) to infer one or more events; identifying at least one inferred event relevant to the user by inputting the one or more inferred events to the first MLA; and communicating the at least one relevant inferred event to the user.

公开(公告)号：US20170344366A1

公开(公告)日：2017-11-30

申请号：US15166444

申请日：2016-05-27

Applicant: ARM Limited

Inventor： Jonathan Curtis BEARD ,  Wendy ELSASSER ,  Eric VAN HENSBERGEN ,  Stephan DIESTELHORST

IPC: G06F9/30 ,  G06F9/38 ,  G06F12/084 ,  G06F12/0875 ,  G06F12/0897

Abstract: A data processing apparatus, and method of operation thereof, for executing instructions. The apparatus includes one or more host processors, each having a first processing unit, and a multi-level memory system. One or more levels of the memory system are tightly coupled to a corresponding second processing unit. At least one of the host processors includes an instruction scheduler that routes instructions selectively to at least one of the first and second processing units, dependent upon the availability of the processing units and the location, within the memory system, of data to be used when executing the instructions.