公开(公告)号：US09678781B2

公开(公告)日：2017-06-13

申请号：US14682310

申请日：2015-04-09

Applicant: ARM Limited

Inventor： Hakan Persson ,  Matt Evans ,  Jason Parker ,  Marc Zyngier

IPC: G06F9/455

CPC classification number: G06F9/45558 ,  G06F2009/45579 ,  G06F2009/45583

Abstract: A data processing system comprises one or more processors that each execute one or more operating systems. Each operating system includes one or more applications. The system also comprises an accelerator that provides a shared resource for a plurality of the applications, an input/output module comprising one or more input/output interfaces for the submission of tasks to the accelerator, a hypervisor that manages the allocation of the input/output interfaces to the one or more operating systems and a storage area accessible by the hypervisor and the accelerator. The accelerator is capable of writing one or more selected pieces of information representative of one or more scheduling statistics of the accelerator periodically to the storage area without having received a request for the one or more selected pieces of information from the hypervisor.

公开(公告)号：US09798565B2

公开(公告)日：2017-10-24

申请号：US14682313

申请日：2015-04-09

Applicant: ARM Limited

Inventor： Hakan Persson ,  Matt Evans ,  Jason Parker ,  Marc Zyngier

IPC: G06F9/455 ,  G06F9/50

CPC classification number: G06F9/45558 ,  G06F9/50 ,  G06F2009/45579 ,  G06F2009/45583

Abstract: A data processing system includes one or more processors that each execute one or more operating systems. Each operating system includes one or more applications. An accelerator provides a shared resource for a plurality of the applications and has one or more input/output interfaces for the submission of tasks to the accelerator from an application. A hypervisor manages the allocation of the input/output interfaces to the one or more operating systems and a hypervisor interface enables communication between the hypervisor and the accelerator. The system is capable of being configured such that an operating system that has been allocated an input/output interface is capable of communicating with the accelerator via the input/output interface independently of the hypervisor. A memory management unit is capable of providing an isolated region of a memory for use by the operating system while the operating system retains its allocated input/output interface.

公开(公告)号：US20150293776A1

公开(公告)日：2015-10-15

申请号：US14682313

申请日：2015-04-09

Applicant: ARM Limited

Inventor： Hakan Persson ,  Matt Evans ,  Jason Parker ,  Marc Zyngier

IPC: G06F9/455

CPC classification number: G06F9/45558 ,  G06F9/50 ,  G06F2009/45579 ,  G06F2009/45583

Abstract: A data processing system includes one or more processors that each execute one or more operating systems. Each operating system includes one or more applications. An accelerator provides a shared resource for a plurality of the applications and has one or more input/output interfaces for the submission of tasks to the accelerator from an application. A hypervisor manages the allocation of the input/output interfaces to the one or more operating systems and a hypervisor interface enables communication between the hypervisor and the accelerator. The system is capable of being configured such that an operating system that has been allocated an input/output interface is capable of communicating with the accelerator via the input/output interface independently of the hypervisor. A memory management unit is capable of providing an isolated region of a memory for use by the operating system whilst the operating system retains its allocated input/output interface.

Abstract translation: 数据处理系统包括一个或多个处理器，每个处理器执行一个或多个操作系统。 每个操作系统包括一个或多个应用程序。 加速器为多个应用提供共享资源，并具有用于从应用程序向加速器提交任务的一个或多个输入/输出接口。 虚拟机管理程序管理对一个或多个操作系统的输入/输出接口的分配，管理程序接口实现管理程序和加速器之间的通信。 该系统能够被配置为使得已经被分配了输入/输出接口的操作系统能够经由独立于管理程序的输入/输出接口与加速器通信。 存储器管理单元能够提供存储器的隔离区域，以供操作系统使用，同时操作系统保留其分配的输入/输出接口。

公开(公告)号：US20150293774A1

公开(公告)日：2015-10-15

申请号：US14682302

申请日：2015-04-09

Applicant: ARM LIMITED

Inventor： Hakan Persson ,  Matt Evans ,  Jason Parker ,  Marc Zyngier

IPC: G06F9/455 ,  G06F9/44

CPC classification number: G06F9/45558 ,  G06F9/4405 ,  G06F9/4411 ,  G06F2009/45579

Abstract: A data processing system includes one or more processors that each execute one or more operating systems that include one or more applications; an accelerator that provides a shared resource for a plurality of the applications; a storage area accessible by the processors and the accelerator; and one or more input/output interfaces for control of, or the submission of tasks to, the accelerator. To initialise one of the input/output interfaces, one of the one or more processors is capable of sending a first signal to the accelerator; the accelerator is capable of writing one or more selected pieces of information representative of one or more capabilities of the accelerator to the storage area and sending a second signal to the processor; the processor is capable of reading the one or more selected pieces of information from the storage area; and the accelerator is capable of configuring the input/output interface.

Abstract translation: 数据处理系统包括一个或多个处理器，每个处理器执行包括一个或多个应用的​​一个或多个操作系统; 提供用于多个应用的​​共享资源的加速器; 由处理器和加速器可访问的存储区域; 以及一个或多个输入/输出接口，用于控制或提交加速器的任务。 为了初始化输入/输出接口之一，一个或多个处理器之一能够向加速器发送第一信号; 加速器能够将表示加速器的一个或多个能力的一个或多个选定的信息段写入存储区域，并向处理器发送第二信号; 处理器能够从存储区域读取一个或多个所选择的信息; 并且加速器能够配置输入/输出接口。

公开(公告)号：US09454397B2

公开(公告)日：2016-09-27

申请号：US14682302

申请日：2015-04-09

Applicant: ARM Limited

Inventor： Hakan Persson ,  Matt Evans ,  Jason Parker ,  Marc Zyngier

IPC: G06F9/455 ,  G06F9/44

CPC classification number: G06F9/45558 ,  G06F9/4405 ,  G06F9/4411 ,  G06F2009/45579

Abstract: A data processing system includes one or more processors that each execute one or more operating systems that include one or more applications; an accelerator that provides a shared resource for a plurality of the applications; a storage area accessible by the processors and the accelerator; and one or more input/output interfaces for control of, or the submission of tasks to, the accelerator. To initialize one of the input/output interfaces, one of the one or more processors is capable of sending a first signal to the accelerator; the accelerator is capable of writing one or more selected pieces of information representative of one or more capabilities of the accelerator to the storage area and sending a second signal to the processor; the processor is capable of reading the one or more selected pieces of information from the storage area; and the accelerator is capable of configuring the input/output interface.

Abstract translation: 数据处理系统包括一个或多个处理器，每个处理器执行包括一个或多个应用的​​一个或多个操作系统; 提供用于多个应用的​​共享资源的加速器; 由处理器和加速器可访问的存储区域; 以及一个或多个输入/输出接口，用于控制或提交加速器的任务。 为了初始化输入/输出接口之一，一个或多个处理器之一能够向加速器发送第一信号; 加速器能够将表示加速器的一个或多个能力的一个或多个选定的信息段写入存储区域，并向处理器发送第二信号; 处理器能够从存储区域读取一个或多个所选择的信息; 并且加速器能够配置输入/输出接口。

公开(公告)号：US20150293775A1

公开(公告)日：2015-10-15

申请号：US14682310

申请日：2015-04-09

Applicant: ARM Limited

Inventor： Hakan Persson ,  Matt Evans ,  Jason Parker ,  Marc Zyngier

IPC: G06F9/455

CPC classification number: G06F9/45558 ,  G06F2009/45579 ,  G06F2009/45583

Abstract: A data processing system comprises one or more processors that each execute one or more operating systems. Each operating system includes one or more applications. The system also comprises an accelerator that provides a shared resource for a plurality of the applications, an input/output module comprising one or more input/output interfaces for the submission of tasks to the accelerator, a hypervisor that manages the allocation of the input/output interfaces to the one or more operating systems and a storage area accessible by the hypervisor and the accelerator. The accelerator is capable of writing one or more selected pieces of information representative of one or more scheduling statistics of the accelerator periodically to the storage area without having received a request for the one or more selected pieces of information from the hypervisor.

Abstract translation: 数据处理系统包括一个或多个处理器，每个处理器执行一个或多个操作系统。 每个操作系统包括一个或多个应用程序。 该系统还包括为多个应用提供共享资源的加速器，包括用于向加速器提交任务的一个或多个输入/输出接口的输入/输出模块，管理程序，用于管理输入/ 输出到一个或多个操作系统的接口以及由管理程序和加速器可访问的存储区域。 加速器能够将表示加速器的一个或多个调度统计信息的一个或多个选定的信息段周期性地写入存储区域，而不从管理程序接收到对于一个或多个所选择的信息的请求。