公开(公告)号：US20240037312A1

公开(公告)日：2024-02-01

申请号：US18087025

申请日：2022-12-22

Applicant: ATI TECHNOLOGIES ULC ,  ADVANCED MICRO DEVICES, INC.

Inventor： David Akselrod ,  Tassanee Payakapan ,  Arie Margulis ,  Chad Robinson

IPC: G06F30/398

CPC classification number: G06F30/398

Abstract: Techniques for implementing selective scan insertion and verification that reduce production and verification time by enabling a test harness to insert and test scan chains are disclosed. Circuit nodes in a system model are selected and scan insertion is provided at the selected nodes. Selective scan insertion can be performed quickly and, in some implementations, automatedly to enable verification of correspondence of different system models or one or more system models and fabricated circuits. A request for manufacture may be generated including aspects of the system model to enable verification of a fabricated circuit in a similar or identical manner to those used to verify the system model.