公开(公告)号：US20190385503A1

公开(公告)日：2019-12-19

申请号：US16436126

申请日：2019-06-10

Applicant: AU Optronics Corporation

Inventor： Chih-Lung Lin ,  Chin-Hsien Tseng ,  Po-Cheng Lai ,  Yu-Sheng Lin ,  Mao-Hsun Cheng

IPC: G09G3/20

Abstract: A pixel circuit includes a light emitting element, a first driver transistor, a second driver transistor, and a first compensation capacitor. A first terminal of the first driving transistor is configured to receive a power signal, and a second terminal of the first driving transistor is electrically coupled to the light emitting element. A first terminal of the second driving transistor receives the power signal, and a control terminal of the second driving transistor is electrically coupled to the light emitting element. The first compensation capacitance is electrically coupled to a control terminal of the first driving transistor and the second terminal of the second driving transistor, respectively.

公开(公告)号：US20210074195A1

公开(公告)日：2021-03-11

申请号：US16952199

申请日：2020-11-19

Applicant: AU Optronics Corporation

Inventor： Chih-Lung Lin ,  Chin-Hsien Tseng ,  Po-Cheng Lai ,  Yu-Sheng Lin ,  Mao-Hsun Cheng

IPC: G09G3/20

Abstract: A pixel circuit includes a light emitting element, a first driver transistor, a second driver transistor, and a first compensation capacitor. A first terminal of the first driving transistor is configured to receive a power signal, and a second terminal of the first driving transistor is electrically coupled to the light emitting element. A first terminal of the second driving transistor receives the power signal, and a control terminal of the second driving transistor is electrically coupled to the light emitting element. The first compensation capacitance is electrically coupled to a control terminal of the first driving transistor and the second terminal of the second driving transistor, respectively.

公开(公告)号：US11495155B2

公开(公告)日：2022-11-08

申请号：US16952199

申请日：2020-11-19

Applicant: AU Optronics Corporation

Inventor： Chih-Lung Lin ,  Chin-Hsien Tseng ,  Po-Cheng Lai ,  Yu-Sheng Lin ,  Mao-Hsun Cheng

IPC: G09G3/3208 ,  G09G3/20

Abstract: A pixel circuit includes a light emitting element, a first driver transistor, a second driver transistor, and a first compensation capacitor. A first terminal of the first driving transistor is configured to receive a power signal, and a second terminal of the first driving transistor is electrically coupled to the light emitting element. A first terminal of the second driving transistor receives the power signal, and a control terminal of the second driving transistor is electrically coupled to the light emitting element. The first compensation capacitance is electrically coupled to a control terminal of the first driving transistor and the second terminal of the second driving transistor, respectively.

公开(公告)号：US10916169B2

公开(公告)日：2021-02-09

申请号：US16436126

申请日：2019-06-10

Applicant: AU Optronics Corporation

Inventor： Chih-Lung Lin ,  Chin-Hsien Tseng ,  Po-Cheng Lai ,  Yu-Sheng Lin ,  Mao-Hsun Cheng

IPC: G09G3/20

Abstract: A pixel circuit includes a light emitting element, a first driver transistor, a second driver transistor, and a first compensation capacitor. A first terminal of the first driving transistor is configured to receive a power signal, and a second terminal of the first driving transistor is electrically coupled to the light emitting element. A first terminal of the second driving transistor receives the power signal, and a control terminal of the second driving transistor is electrically coupled to the light emitting element. The first compensation capacitance is electrically coupled to a control terminal of the first driving transistor and the second terminal of the second driving transistor, respectively.

公开(公告)号：US10175098B2

公开(公告)日：2019-01-08

申请号：US15450583

申请日：2017-03-06

Applicant: AU Optronics Corporation

Inventor： Chih-Lung Lin ,  Chia-En Wu ,  Po-Syun Chen ,  Fu-Hsing Chen ,  Ming-Xun Wang ,  Ching-En Lee ,  Po-Cheng Lai ,  Jian-Shen Yu

IPC: G01J1/02 ,  G01J1/04 ,  G01J1/46 ,  G06F3/042 ,  G01J1/44 ,  G06F3/03

Abstract: An optical sensing circuit has a plurality of optical sensing units arranged so that the optical sensing circuit is ambient light insensitive or sensitive to light within certain spectrum. The sensitive spectra corresponding to the plurality of optical sensing units are different from one another.

公开(公告)号：US11289013B2

公开(公告)日：2022-03-29

申请号：US17075066

申请日：2020-10-20

Applicant: AU Optronics Corporation

Inventor： Chih-Lung Lin ,  Po-Cheng Lai ,  Ting-Ching Chu ,  Po-Chun Lai ,  Mao-Hsun Cheng

IPC: G09G3/3233 ,  G09G3/32

Abstract: A pixel circuit including a compensation circuit, a writing circuit, a light emitting element, and a power supplying circuit is provided. The compensation circuit comprises a first node, and provides a driving current to the light emitting element according to a voltage of the first node and a system high voltage. The writing circuit provides a data voltage to the compensation circuit according to a first control signal so that the compensation circuit sets the voltage of the first node. The power supplying circuit selectively couples the compensation circuit to the light emitting element, and provides the system high voltage and a system low voltage to the compensation circuit, in which the system low voltage is configured to reset the voltage of the first node. The first control signal and the second control signal are opposite to the first emission signal and the second emission signal, respectively.

公开(公告)号：US10964245B2

公开(公告)日：2021-03-30

申请号：US16653459

申请日：2019-10-15

Applicant: AU Optronics Corporation

Inventor： Po-Cheng Lai ,  Mao-Hsun Cheng ,  Cheng-Han Huang ,  Yung-Chih Chen ,  Ching-Sheng Cheng ,  Chih-Lung Lin

IPC: G11C19/00 ,  G09G3/20 ,  G11C19/28 ,  G09G3/36

Abstract: A shift register circuit and a gate driver including the shift register circuit. The shift register circuit includes an input circuit, a drive circuit, a pull-down circuit, a regulator circuit and a pull-up circuit. The input circuit is configured to receive a first clock signal and is coupled to the first node. The driving circuit is configured to receive the first clock signal and a second clock signal. The input circuit is coupled to the first node. The pull-down circuit is configured to receive the voltage of the first node. The pull-down circuit is coupled to the first node and an output terminal. The pull-down circuit outputs the first voltage to the output terminal in response to the voltage of the first node.