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公开(公告)号：US10019956B2
公开(公告)日：2018-07-10
申请号：US15139827
申请日：2016-04-27
Applicant: AU OPTRONICS CORPORATION
Inventor： Chun-Da Tu , Yung-Chih Chen , Cheng-Han Huang , Kai-Wei Hong , Hsiang-Sheng Chang , Chuang-Cheng Yang
CPC classification number: G09G3/3648 , G09G3/3677 , G09G2300/0408 , G09G2310/0286 , G09G2310/08 , G09G2320/0214 , G11C19/28
Abstract: A shift register including a voltage set unit, a driver unit, a control unit, a first transistor, a second transistor, a third transistor and a fourth transistor is provided. The voltage set unit provides a terminal voltage. The driver unit provides a main gate signal according to the terminal voltage and a clock signal. The control unit provides a control signal. The first transistor receives the terminal voltage, a level reference voltage and the control signal. The second transistor is coupled to the first transistor and receives a low voltage and the control signal. The third transistor receives the terminal voltage, a level reference voltage and a gate reference signal. The fourth transistor is coupled to the third transistor and receives the low voltage and the gate reference signal.
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公开(公告)号：US20170124971A1
公开(公告)日：2017-05-04
申请号：US15139827
申请日：2016-04-27
Applicant: AU OPTRONICS CORPORATION
Inventor： Chun-Da Tu , Yung-Chih Chen , Cheng-Han Huang , Kai-Wei Hong , Hsiang-Sheng Chang , Chuang-Cheng Yang
CPC classification number: G09G3/3648 , G09G3/3677 , G09G2300/0408 , G09G2310/0286 , G09G2310/08 , G09G2320/0214 , G11C19/28
Abstract: A shift register including a voltage set unit, a driver unit, a control unit, a first transistor, a second transistor, a third transistor and a fourth transistor is provided. The voltage set unit provides a terminal voltage. The driver unit provides a main gate signal according to the terminal voltage and a clock signal. The control unit provides a control signal. The first transistor receives the terminal voltage, a level reference voltage and the control signal. The second transistor is coupled to the first transistor and receives a low voltage and the control signal. The third transistor receives the terminal voltage, a level reference voltage and a gate reference signal. The fourth transistor is coupled to the third transistor and receives the low voltage and the gate reference signal.
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公开(公告)号：US20200185565A1
公开(公告)日：2020-06-11
申请号：US16430443
申请日：2019-06-04
Applicant: Au Optronics Corporation
Inventor： Yung-Chih Chen , Tsung-Ying Ke , Li-Chih Hsu , Keh-Long Hwu , Wan-Tsang Wang , Chun-Hsin Liu
Abstract: A manufacturing method of a light-emitting device including the following steps is provided. A test trace and a first signal trace are formed on a first substrate. A light-emitting element electrically connected to the test trace and the first signal trace is formed. A test procedure is performed on the light-emitting element via the test trace and the first signal trace. An encapsulation layer is formed on the first substrate to cover the light-emitting element. The test trace is removed, and then a driving unit electrically connected to light-emitting element is formed.
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公开(公告)号：US09525079B2
公开(公告)日：2016-12-20
申请号：US14243144
申请日：2014-04-02
Applicant: AU Optronics Corporation
Inventor： Yung-Chih Chen , Huang-Chi Tseng
IPC: H01L31/00 , H01L31/02 , H01L31/048 , H01L31/05
CPC classification number: H01L31/02013 , H01L31/048 , H01L31/0504 , H01L31/0508 , Y02E10/50
Abstract: A photoelectrical conversion module includes at least one photoelectrical conversion device, at least one first ribbon, a second ribbon, and at least two encapsulation layers. The photoelectrical conversion device includes a solar substrate having a plurality of finger electrodes. The first ribbon is located on the solar substrate and is intersected with the finger electrodes. The first ribbon has a first connection portion located out of the solar substrate. The second ribbon has at least one second connection portion. The first connection portion is intersected and overlapped with the second connection portion, such that a portion of the first connection portion is located above the second connection portion, and another portion of the first connection portion is located under the second connection portion. The relative position of the first and second ribbons is fixed by the encapsulation layers.
Abstract translation: 光电转换模块包括至少一个光电转换装置，至少一个第一带状物，第二带状物和至少两个封装层。 光电转换装置包括具有多个指状电极的太阳能电池基板。 第一带位于太阳能基底上，与指状电极相交。 第一带具有位于太阳能基板之外的第一连接部。 第二带状物具有至少一个第二连接部分。 第一连接部分与第二连接部分交叉并重叠，使得第一连接部分的一部分位于第二连接部分的上方，第一连接部分的另一部分位于第二连接部分下方。 第一和第二带的相对位置被封装层固定。
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公开(公告)号：US08724067B2
公开(公告)日：2014-05-13
申请号：US13928397
申请日：2013-06-27
Applicant: Au Optronics Corporation
Inventor： Kuo-Chang Su , Kuo-Hua Hsu , Chun-Hsin Liu , Yung-Chih Chen
IPC: G02F1/1343
CPC classification number: G02F1/136286 , G09G3/3614 , G09G3/3648 , G09G2300/0426 , G09G2300/0452 , G09G2320/0233 , G09G2330/021
Abstract: An active device array substrate includes a substrate, first scan lines, second scan lines, data lines, and pixels. The first and the second scan lines are alternately arranged along a first direction. The data lines are arranged in parallel along a second direction. The pixels are arranged to form first pixel rows and second pixel rows alternately arranged in the first direction. The first pixel row includes first and second pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The second pixel row includes third and fourth pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The pixels between two adjacent data lines are arranged in two columns. Among the pixels in the same column, the pixels in odd rows and in even rows are electrically connected to different data lines, respectively.
Abstract translation: 有源器件阵列衬底包括衬底，第一扫描线，第二扫描线，数据线和像素。 第一和第二扫描线沿着第一方向交替布置。 数据线沿第二方向平行布置。 像素被布置成形成沿第一方向交替布置的第一像素行和第二像素行。 第一像素行包括分别电连接到第一扫描线，第二扫描线和数据线的第一和第二像素。 第二像素行包括分别电连接到第一扫描线，第二扫描线和数据线的第三和第四像素。 两个相邻数据线之间的像素排列成两列。 在同一列中的像素中，奇数行和偶数行中的像素分别电连接到不同的数据线。
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Patent Agency Ranking
公开(公告)号：US10950163B2
公开(公告)日：2021-03-16
申请号：US16658650
申请日：2019-10-21
Applicant: AU Optronics Corporation
Inventor： Po-Chun Lai , Wei-Ting Wu , Syuan Shih , Wan-Lin Chen , Ming-Yuan Tang , Wei-Hsuan Chang , Yung-Chih Chen
IPC: G09G3/20 , G09G3/3233
Abstract: A pixel circuit includes a driving circuit, a lighting element, and multiple switching circuits. The driving circuit is configured to provide a driving current to a first node. A first terminal of the lighting element is coupled with a second node. A second terminal of the lighting element is configured to receive a system low voltage. The multiple switching circuits are coupled between the first node and the second node in a parallel connection, and configured to correspondingly receive multiple emission control signals and at least one grayscale control signal. During each frame, the multiple emission control signals provide multiple pulses, and the multiple pulses do not mutually overlapping in time sequence, so that the multiple switching circuits selectively couple the first node to the second node according to the multiple pulses and the at least one grayscale control signal.
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7.发明申请公开(公告)号：US20210057516A1
公开(公告)日：2021-02-25
申请号：US17093592
申请日：2020-11-09
Applicant: Au Optronics Corporation
Inventor： Tsung-Ying Ke , Yung-Chih Chen , Keh-Long Hwu , Wan-Tsang Wang , Chun-Hsin Liu
IPC: H01L27/32
Abstract: A display panel including a first array substrate, a first pad, and a second pad is provided. The first array substrate includes a first substrate, a first active element, a first display element, and a second display element. The first active element is disposed on the top surface of the first substrate. The first display element and the second display element are disposed on the top surface of the first substrate. The first display element is electrically connected to the first active element. The first pad and the second pad are disposed on the bottom surface of the first substrate. The first active element is electrically connected to the first pad. Each of the first pad and the second pad includes an embedded part and a protruded part. The embedded part is located in the first substrate. The protruded part is protruded from the bottom surface of the first substrate.
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公开(公告)号：US10861882B2
公开(公告)日：2020-12-08
申请号：US16512416
申请日：2019-07-16
Applicant: Au Optronics Corporation
Inventor： Mao-Hsun Cheng , Chia-Che Hung , Yung-Chih Chen , Cheng-Yeh Tsai , Cheng-Han Huang , Chen-Chi Lin
Abstract: A pixel structure includes a first TFT, an adhesive layer, an LED, and a detection conductive layer. The first TFT is coupled to a conductive layer and is configured to transmit display data to the conductive layer. The adhesive layer covers the conductive layer. The LED is disposed on the adhesive layer. The detection conductive layer is disposed on the adhesive layer, and the detection conductive layer, the adhesive layer, and the conductive layer constitute a detection capacitor. Here, a thickness of the detection conductive layer is equal to or slightly greater than a height of the LED.
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公开(公告)号：US20190319080A1
公开(公告)日：2019-10-17
申请号：US16166172
申请日：2018-10-22
Applicant: Au Optronics Corporation
Inventor： Tsung-Ying Ke , Yung-Chih Chen , Keh-Long Hwu , Wan-Tsang Wang , Chun-Hsin Liu
Abstract: A display apparatus and a manufacturing method thereof are provided. The display apparatus includes a signal line substrate, pixel circuit substrates, light emitting device layer, first vertical connection structures and second vertical connection structures. The signal line substrate includes signal lines and vertical signal connection structures electrically connected with the signal lines. The pixel circuit substrates are stacked on the signal line substrate, and respectively include a pixel circuit. The light emitting device layer is disposed on the pixel circuit substrates, and includes light emitting devices. The first and second vertical connection structures are disposed in the pixel circuit substrates. The first vertical connection structures are electrically connected between the light emitting devices and the pixel circuits, respectively. The second vertical connection structures are electrically connected between the pixel circuits and the vertical signal connection structures, respectively.
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公开(公告)号：US20190237006A1
公开(公告)日：2019-08-01
申请号：US16223111
申请日：2018-12-18
Applicant: Au Optronics Corporation
Inventor： Mao-Hsun Cheng , Cheng-Han Huang , Wei-Ting Wu , Yung-Chih Chen
IPC: G09G3/32
CPC classification number: G09G3/32 , G09G2300/0819 , G09G2320/0233
Abstract: A display panel and a compensation circuit are provided. The display panel has a periphery region and a display region. The display panel includes pixel columns and a threshold voltage compensation circuit. The pixel columns are disposed in the display region. The threshold voltage compensation circuit is disposed in the periphery region. The threshold voltage compensation circuit receives a compensation voltage, outputs threshold voltage information of a compensation transistor based on the compensation voltage, and generates compensated display data based on the threshold voltage information and display data.
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