摘要:
A system and method for limiting the size of a local storage of a processor are provided. A facility is provided in association with a processor for setting a local storage size limit. This facility is a privileged facility and can only be accessed by the operating system running on a control processor in the multiprocessor system or the associated processor itself. The operating system sets the value stored in the local storage limit register when the operating system initializes a context switch in the processor. When the processor accesses the local storage using a request address, the local storage address corresponding to the request address is compared against the local storage limit size value in order to determine if the local storage address, or a modulo of the local storage address, is used to access the local storage.
摘要:
A method implemented in a computing system is provided to determine an individual's level of impairment through a comparison of an individual's pre-impairment base-line score, and an individual's post-impairment score through the system's administration of a plurality of tasks to completed by the individual, and to be calculated and stored by the system.
摘要:
Methods and systems are described for monitoring and compensating an offset between a reference voltage used in a first device and a corresponding reference voltage used in a second device. The first device can include offset circuitry. The offset circuitry receives two voltage signals. The first voltage signal is equal to a first voltage value that is used as a reference voltage in the first device. The second voltage signal can be a time-varying voltage signal that has a known relationship with a second voltage value that is used as a reference voltage in the second device. The offset circuitry can then determine the second voltage value from the second voltage signal, and output an offset value based on a difference between the first voltage value and the second voltage value.
摘要:
Circuits and systems for generating multiple frequencies are disclosed. In some embodiments, a circuit can include a first node, a second node, and a programmable phase rotator. The first node can receive a first signal having frequency f1, and the second node can output a second signal having frequency f2 that is different from f1. In some embodiments, a frequency divider can generate a third signal having frequency f3 based on the second signal. In some embodiments, a frequency divider can generate the first signal based on a reference signal having frequency f4. The programmable phase rotator can be capable of updating, at an update frequency that is substantially equal to f1 and/or f4, a phase difference between the first signal and the second signal. In some embodiments, the circuit can be part of a USB (Universal Serial Bus) 3.0 physical layer (PHY) circuit.
摘要:
Circuits and systems for generating multiple frequencies are disclosed. In some embodiments, a circuit can include a first node, a second node, and a programmable phase rotator. The first node can receive a first signal having frequency f1, and the second node can output a second signal having frequency f2 that is different from f1. In some embodiments, a frequency divider can generate a third signal having frequency f3 based on the second signal. In some embodiments, a frequency divider can generate the first signal based on a reference signal having frequency f4. The programmable phase rotator can be capable of updating, at an update frequency that is substantially equal to f1 and/or f4, a phase difference between the first signal and the second signal. In some embodiments, the circuit can be part of a USB (Universal Serial Bus) 3.0 physical layer (PHY) circuit.
摘要:
Methods and systems are described for monitoring and compensating an offset between a reference voltage used in a first device and a corresponding reference voltage used in a second device. The first device can include offset circuitry. The offset circuitry receives two voltage signals. The first voltage signal is equal to a first voltage value that is used as a reference voltage in the first device. The second voltage signal can be a time-varying voltage signal that has a known relationship with a second voltage value that is used as a reference voltage in the second device. The offset circuitry can then determine the second voltage value from the second voltage signal, and output an offset value based on a difference between the first voltage value and the second voltage value.