Broadcasting Instructions/Data to a Plurality of Processors in a Multiprocessor Device Via Aliasing
    1.
    发明申请
    Broadcasting Instructions/Data to a Plurality of Processors in a Multiprocessor Device Via Aliasing 有权
    广播指令/数据到多处理器设备中的多个处理器通过混叠

    公开(公告)号:US20080229051A1

    公开(公告)日:2008-09-18

    申请号:US12129042

    申请日:2008-05-29

    IPC分类号: G06F9/26

    摘要: A mechanism for broadcasting instructions/data to a plurality of processors in a multiprocessor device via aliasing is provided. In order to broadcast data to a plurality of processors, a control processor writes to the registers that store the identifiers of the processors and sets two or more of these registers to a same value. The control processor may write the desired data/instructions to be broadcast to a portion of memory corresponding to the starting address associated with the processor identifier of the two or more processors. When the two or more processors look for a starting address of their local store from which to read the two or more processors will identify the same starting address, essentially aliasing the memory region. The two or more processors will read the instructions/data from the same aliased memory region starting at the identified starting address and process the same instructions/data.

    摘要翻译: 提供了一种通过混叠向多处理器设备中的多个处理器广播指令/数据的机制。 为了向多个处理器广播数据,控制处理器向存储处理器的标识符的寄存器进行写入,并将这些寄存器中的两个或更多个设置为相同的值。 控制处理器可以将要广播的所需数据/指令写入对应于与两个或多个处理器的处理器标识符相关联的起始地址的存储器的一部分。 当两个或多个处理器寻找其本地存储器的起始地址时,从其读取两个或多个处理器将识别相同的起始地址,基本上将该存储器区域混叠。 两个或多个处理器将从识别的起始地址开始读取来自相同别名存储器区域的指令/数据,并处理相同的指令/数据。

    SYSTEM AND METHOD FOR BROADCASTING INSTRUCTIONS/DATA TO A PLURALITY OF PROCESSORS IN A MULTIPROCESSOR DEVICE VIA ALIASING
    2.
    发明申请
    SYSTEM AND METHOD FOR BROADCASTING INSTRUCTIONS/DATA TO A PLURALITY OF PROCESSORS IN A MULTIPROCESSOR DEVICE VIA ALIASING 失效
    用于通过处理在多处理器装置中将指令/数据广播到多个处理器的系统和方法

    公开(公告)号:US20070283037A1

    公开(公告)日:2007-12-06

    申请号:US11421512

    申请日:2006-06-01

    IPC分类号: G06F15/173

    摘要: A system and method for broadcasting instructions/data to a plurality of processors in a multiprocessor device via aliasing are provided. In order to broadcast data to a plurality of processors, a control processor writes to the registers that store the identifiers of the processors and sets two or more of these registers to a same value. The control processor may write the desired data/instructions to be broadcast to a portion of memory corresponding to the starting address associated with the processor identifier of the two or more processors. When the two or more processors look for a starting address of their local store from which to read, the two or more processors will identify the same starting address, essentially aliasing the memory region. The two or more processors will read the instructions/data from the same aliased memory region starting at the identified starting address and process the same instructions/data.

    摘要翻译: 提供了一种通过混叠向多处理器设备中的多个处理器广播指令/数据的系统和方法。 为了向多个处理器广播数据,控制处理器向存储处理器的标识符的寄存器进行写入,并将这些寄存器中的两个或更多个设置为相同的值。 控制处理器可以将要广播的所需数据/指令写入对应于与两个或多个处理器的处理器标识符相关联的起始地址的存储器的一部分。 当两个或多个处理器寻找要从其读取的本地存储器的起始地址时,两个或更多个处理器将标识相同的起始地址,基本上将存储器区域混叠。 两个或多个处理器将从识别的起始地址开始读取来自相同别名存储器区域的指令/数据,并处理相同的指令/数据。

    Broadcasting instructions/data to a plurality of processors in a multiprocessor device via aliasing
    3.
    发明授权
    Broadcasting instructions/data to a plurality of processors in a multiprocessor device via aliasing 有权
    通过混叠将广播指令/数据传送到多处理器设备中的多个处理器

    公开(公告)号:US08250338B2

    公开(公告)日:2012-08-21

    申请号:US12129042

    申请日:2008-05-29

    IPC分类号: G06F15/80

    摘要: A mechanism for broadcasting instructions/data to a plurality of processors in a multiprocessor device via aliasing is provided. In order to broadcast data to a plurality of processors, a control processor writes to the registers that store the identifiers of the processors and sets two or more of these registers to a same value. The control processor may write the desired data/instructions to be broadcast to a portion of memory corresponding to the starting address associated with the processor identifier of the two or more processors. When the two or more processors look for a starting address of their local store from which to read, the two or more processors will identify the same starting address, essentially aliasing the memory region. The two or more processors will read the instructions/data from the same aliased memory region starting at the identified starting address and process the same instructions/data.

    摘要翻译: 提供了一种通过混叠向多处理器设备中的多个处理器广播指令/数据的机制。 为了向多个处理器广播数据,控制处理器向存储处理器的标识符的寄存器进行写入,并将这些寄存器中的两个或更多个设置为相同的值。 控制处理器可以将要广播的所需数据/指令写入对应于与两个或多个处理器的处理器标识符相关联的起始地址的存储器的一部分。 当两个或多个处理器寻找要从其读取的本地存储器的起始地址时,两个或更多个处理器将标识相同的起始地址,基本上将存储器区域混叠。 两个或多个处理器将从识别的起始地址开始读取来自相同别名存储器区域的指令/数据,并处理相同的指令/数据。

    Method for broadcasting instructions/data to a plurality of processors in a multiprocessor device via aliasing
    4.
    发明授权
    Method for broadcasting instructions/data to a plurality of processors in a multiprocessor device via aliasing 失效
    通过混叠将指令/数据广播到多处理器设备中的多个处理器的方法

    公开(公告)号:US07493468B2

    公开(公告)日:2009-02-17

    申请号:US11421512

    申请日:2006-06-01

    IPC分类号: G06F15/80

    摘要: A method for broadcasting instructions/data to a plurality of processors in a multiprocessor device via aliasing is provided. In order to broadcast data to a plurality of processors, a control processor writes to the registers that store the identifiers of the processors and sets two or more of these registers to a same value. The control processor may write the desired data/instructions to be broadcast to a portion of memory corresponding to the starting address associated with the processor identifier of the two or more processors. When the two or more processors look for a starting address of their local store from which to read, the two or more processors will identify the same starting address, essentially aliasing the memory region. The two or more processors will read the instructions/data from the same aliased memory region starting at the identified starting address and process the same instructions/data.

    摘要翻译: 提供了一种通过混叠向多处理器设备中的多个处理器广播指令/数据的方法。 为了向多个处理器广播数据,控制处理器向存储处理器的标识符的寄存器进行写入,并将这些寄存器中的两个或更多个设置为相同的值。 控制处理器可以将要广播的所需数据/指令写入对应于与两个或多个处理器的处理器标识符相关联的起始地址的存储器的一部分。 当两个或多个处理器寻找要从其读取的本地存储器的起始地址时,两个或更多个处理器将标识相同的起始地址,基本上将存储器区域混叠。 两个或多个处理器将从识别的起始地址开始读取来自相同别名存储器区域的指令/数据,并处理相同的指令/数据。

    Secure wireless device area network of a cellular system
    5.
    发明授权
    Secure wireless device area network of a cellular system 有权
    蜂窝系统的安全无线设备区域网络

    公开(公告)号:US08868034B2

    公开(公告)日:2014-10-21

    申请号:US12978562

    申请日:2010-12-25

    IPC分类号: H04M1/66 H04W12/06 H04W12/08

    CPC分类号: H04W12/06 H04W12/08

    摘要: Embodiments may comprise logic such as hardware and/or code to provide a secure device area network. Many embodiments comprise a gateway node or enterprise enhanced node with a services distribution frame installed on a customer's premises. The gateway node or enterprise enhanced node may interconnect the secure wireless device area network at the customer's premises with a cellular network. In many embodiments, the cellular network core may provision authentication credentials and security keys, and manage access polies to facilitate access by Application Service Providers to devices on premises including smart devices via a security and policy enforcement function of a services distribution frame of the gateway node or enterprise enhanced node, Authorized members of the secure wireless device area network may connect to the Wide Area Network (WAN) through the gateway node and the cellular network core.

    摘要翻译: 实施例可以包括诸如用于提供安全设备区域网络的硬件和/或代码的逻辑。 许多实施例包括网关节点或企业增强节点,其中服务分配框架安装在客户的房屋中。 网关节点或企业增强节点可以将客户场所处的安全无线设备区域网络与蜂窝网络互连。 在许多实施例中,蜂窝网络核心可以提供认证证书和安全密钥,并且管理访问波束以便于应用服务提供商经由网关节点的服务分配帧的安全和策略执行功能来访问包括智能设备在内的设备上的设备 或企业增强节点,安全无线设备区域网络的授权成员可以通过网关节点和蜂窝网络核心连接到广域网(WAN)。

    System for limiting the size of a local storage of a processor
    6.
    发明授权
    System for limiting the size of a local storage of a processor 失效
    用于限制处理器的本地存储器的大小的系统

    公开(公告)号:US07730279B2

    公开(公告)日:2010-06-01

    申请号:US12429676

    申请日:2009-04-24

    IPC分类号: G06F12/00

    CPC分类号: G06F12/0661 G06F12/0223

    摘要: A system for limiting the size of a local storage of a processor is provided. A facility is provided in association with a processor for setting a local storage size limit. This facility is a privileged facility and can only be accessed by the operating system running on a control processor in the multiprocessor system or the associated processor itself. The operating system sets the value stored in the local storage limit register when the operating system initializes a context switch in the processor. When the processor accesses the local storage using a request address, the local storage address corresponding to the request address is compared against the local storage limit size value in order to determine if the local storage address, or a modulo of the local storage address, is used to access the local storage.

    摘要翻译: 提供了用于限制处理器的本地存储器的大小的系统。 与用于设置本地存储大小限制的处理器相关联地提供设施。 该设施是一种特权设施,只能由在多处理器系统或相关处理器本身的控制处理器上运行的操作系统访问。 当操作系统初始化处理器中的上下文切换时,操作系统设置存储在本地存储限制寄存器中的值。 当处理器使用请求地址访问本地存储器时,将与请求地址相对应的本地存储地址与本地存储限制大小值进行比较,以便确定本地存储地址或本地存储地址的模数是否为 用于访问本地存储。

    Secure Wireless Device Area Network of a Cellular System
    7.
    发明申请
    Secure Wireless Device Area Network of a Cellular System 有权
    蜂窝系统的安全无线设备区域网络

    公开(公告)号:US20120164975A1

    公开(公告)日:2012-06-28

    申请号:US12978562

    申请日:2010-12-25

    IPC分类号: H04M3/16 H04W12/06

    CPC分类号: H04W12/06 H04W12/08

    摘要: Embodiments may comprise logic such as hardware and/or code to provide a secure device area network. Many embodiments comprise a gateway node or enterprise enhanced node with a services distribution frame installed on a customer's premises. The gateway node or enterprise enhanced node may interconnect the secure wireless device area network at the customer's premises with a cellular network. In many embodiments, the cellular network core may provision authentication credentials and security keys, and manage access polies to facilitate access by Application Service Providers to devices on premises including smart devices via a security and policy enforcement function of a services distribution frame of the gateway node or enterprise enhanced node, Authorized members of the secure wireless device area network may connect to the Wide Area Network (WAN) through the gateway node and the cellular network core.

    摘要翻译: 实施例可以包括诸如用于提供安全设备区域网络的硬件和/或代码的逻辑。 许多实施例包括网关节点或企业增强节点,其中服务分配框架安装在客户的房屋中。 网关节点或企业增强节点可以将客户场所处的安全无线设备区域网络与蜂窝网络互连。 在许多实施例中,蜂窝网络核心可以提供认证证书和安全密钥,并且管理访问波束以便于应用服务提供商经由网关节点的服务分配帧的安全和策略执行功能来访问包括智能设备在内的设备上的设备 或企业增强节点,安全无线设备区域网络的授权成员可以通过网关节点和蜂窝网络核心连接到广域网(WAN)。

    System for Limiting the Size of a Local Storage of a Processor
    8.
    发明申请
    System for Limiting the Size of a Local Storage of a Processor 失效
    限制处理器本地存储大小的系统

    公开(公告)号:US20090204781A1

    公开(公告)日:2009-08-13

    申请号:US12429676

    申请日:2009-04-24

    CPC分类号: G06F12/0661 G06F12/0223

    摘要: A system for limiting the size of a local storage of a processor is provided. A facility is provided in association with a processor for setting a local storage size limit. This facility is a privileged facility and can only be accessed by the operating system running on a control processor in the multiprocessor system or the associated processor itself. The operating system sets the value stored in the local storage limit register when the operating system initializes a context switch in the processor. When the processor accesses the local storage using a request address, the local storage address corresponding to the request address is compared against the local storage limit size value in order to determine if the local storage address, or a modulo of the local storage address, is used to access the local storage.

    摘要翻译: 提供了用于限制处理器的本地存储器的大小的系统。 与用于设置本地存储大小限制的处理器相关联地提供设施。 该设施是一种特权设施,只能由在多处理器系统或相关处理器本身的控制处理器上运行的操作系统访问。 当操作系统初始化处理器中的上下文切换时,操作系统设置存储在本地存储限制寄存器中的值。 当处理器使用请求地址访问本地存储器时,将与请求地址相对应的本地存储地址与本地存储限制大小值进行比较,以便确定本地存储地址或本地存储地址的模数是否为 用于访问本地存储。

    Method for limiting the size of a local storage of a processor
    9.
    发明授权
    Method for limiting the size of a local storage of a processor 失效
    用于限制处理器的本地存储器的大小的方法

    公开(公告)号:US07533238B2

    公开(公告)日:2009-05-12

    申请号:US11208376

    申请日:2005-08-19

    IPC分类号: G06F12/00

    CPC分类号: G06F12/0661 G06F12/0223

    摘要: A method for limiting the size of a local storage of a processor is provided. A facility is provided in association with a processor for setting a local storage size limit. This facility is a privileged facility and can only be accessed by the operating system running on a control processor in the multiprocessor system or the associated processor itself The operating system sets the value stored in the local storage limit register when the operating system initializes a context switch in the processor. When the processor accesses the local storage using a request address, the local storage address corresponding to the request address is compared against the 1ocal storage limit size value in order to determine if the local storage address, or a modulo of the local storage address, is used to access the local storage.

    摘要翻译: 提供了一种用于限制处理器的本地存储器的大小的方法。 与用于设置本地存储大小限制的处理器相关联地提供设施。 该设施是一个特权设施,只能由在多处理器系统或相关处理器本身的控制处理器上运行的操作系统访问。当操作系统初始化上下文切换时,操作系统设置存储在本地存储限制寄存器中的值 在处理器中。 当处理器使用请求地址访问本地存储器时,将与请求地址相对应的本地存储地址与本地存储限制大小值进行比较,以便确定本地存储地址或本地存储地址的模数是否为 用于访问本地存储。