公开(公告)号：US11791008B2

公开(公告)日：2023-10-17

申请号：US17582114

申请日：2022-01-24

Applicant: Advanced Micro Devices, Inc.

Inventor： Glennis Eliagh Covington ,  Benjamin Lyle Winston ,  Santha Kumar Parameswaran ,  Shannon T. Kesner

IPC: G11C29/38 ,  G11C11/4093

CPC classification number: G11C29/38 ,  G11C11/4093

Abstract: Methods, devices, and systems for testing a number of combinations of memory in a computer system. A modular memory device is installed in a memory channel in communication with a processor. The modular memory device includes a number of memory storage devices. The number of memory storage devices include a number of pins. For each of a number of subsets of the number of memory storage devices, a subset of the number of memory storage devices is selected, each pin of a subset of the number of pins which do not correspond to the subset of the number of memory storage devices is configured with a termination impedance, and the subset of the number of memory storage devices is tested.

公开(公告)号：US20220148669A1

公开(公告)日：2022-05-12

申请号：US17582114

申请日：2022-01-24

Applicant: Advanced Micro Devices, Inc.

Inventor： Glennis Eliagh Covington ,  Benjamin Lyle Winston ,  Santha Kumar Parameswaran ,  Shannon T. Kesner

IPC: G11C29/38 ,  G11C11/4093

Abstract: Methods, devices, and systems for testing a number of combinations of memory in a computer system. A modular memory device is installed in a memory channel in communication with a processor. The modular memory device includes a number of memory storage devices. The number of memory storage devices include a number of pins. For each of a number of subsets of the number of memory storage devices, a subset of the number of memory storage devices is selected, each pin of a subset of the number of pins which do not correspond to the subset of the number of memory storage devices is configured with a termination impedance, and the subset of the number of memory storage devices is tested.

公开(公告)号：US11232847B2

公开(公告)日：2022-01-25

申请号：US16578209

申请日：2019-09-20

Applicant: Advanced Micro Devices, Inc.

Inventor： Glennis Eliagh Covington ,  Benjamin Lyle Winston ,  Santha Kumar Parameswaran ,  Shannon T. Kesner

IPC: G11C29/00 ,  G11C29/38 ,  G11C11/4093

Abstract: Methods, devices, and systems for testing a number of combinations of memory in a computer system. A modular memory device is installed in a memory channel in communication with a processor. The modular memory device includes a number of memory storage devices. The number of memory storage devices include a number of pins. A subset of the number of memory storage devices is selected. A subset of the plurality of pins which do not correspond to the subset of the number of memory storage devices and are not part of a memory map of the computer system is selected. Each pin of the subset of the plurality of pins configured with a termination impedance. The subset of the number of memory storage devices is tested.

公开(公告)号：US20210090676A1

公开(公告)日：2021-03-25

申请号：US16578209

申请日：2019-09-20

Applicant: Advanced Micro Devices, Inc.

Inventor： Glennis Eliagh Covington ,  Benjamin Lyle Winston ,  Santha Kumar Parameswaran ,  Shannon T. Kesner

IPC: G11C29/38 ,  G11C11/4093

Abstract: Methods, devices, and systems for testing a number of combinations of memory in a computer system. A modular memory device is installed in a memory channel in communication with a processor. The modular memory device includes a number of memory storage devices. The number of memory storage devices include a number of pins. For each of a number of subsets of the number of memory storage devices, a subset of the number of memory storage devices is selected, each pin of a subset of the number of pins which do not correspond to the subset of the number of memory storage devices is configured with a termination impedance, and the subset of the number of memory storage devices is tested.