公开(公告)号：US09997442B1

公开(公告)日：2018-06-12

申请号：US15379362

申请日：2016-12-14

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chai-Chi Lin ,  Chih-Cheng Lee ,  Hsing Kuo Tien ,  Chih-Yung Yang

IPC: H01L23/498 ,  H01L23/538 ,  H01L21/48 ,  H01L25/18 ,  H01L25/16 ,  H01L25/065

CPC classification number: H01L23/49822 ,  H01L21/481 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L25/0655 ,  H01L25/16 ,  H01L25/18 ,  H01L2224/16225

Abstract: A semiconductor substrate includes an interconnection structure and a dielectric layer. The dielectric layer surrounds the interconnection structure and defines a first cavity. The first cavity is defined by a first sidewall, a second sidewall, and a first surface of the dielectric layer. The first sidewall is laterally displaced from the second sidewall.