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公开(公告)号:US20170363682A1
公开(公告)日:2017-12-21
申请号:US15183253
申请日:2016-06-15
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Yu-Jung CHANG , Wei-Kai LIAO , Ming-Ching LIN , Kuei-Hao TSENG
IPC: G01R31/28
CPC classification number: G01R31/2896 , G01R31/046 , G01R31/2853 , G01R31/31715
Abstract: A testing system includes a subtractor and a divider. The subtractor is configured to receive a first voltage of a circuit being tested and a second voltage of the circuit, and to derive a difference between the first voltage and the second voltage. The divider is configured to receive the difference between the first voltage and the second voltage, and to derive a resistance of the circuit by dividing (i) the difference between the first voltage and the second voltage by (ii) a difference between a first current applied to the circuit and a second current applied to the circuit. The first voltage is corresponding to the first current, and the second voltage is corresponding to the second current.