公开(公告)号：US11791293B2

公开(公告)日：2023-10-17

申请号：US17480123

申请日：2021-09-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen Hung Huang ,  Yan Wen Chung ,  Wei Chu Sun

IPC: H01L29/40 ,  H01L23/48 ,  H01L23/52 ,  H01L23/66 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L23/66 ,  H01L23/49822 ,  H01L23/562 ,  H01L2223/6616 ,  H01L2223/6677

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes an antenna zone and a routing zone. The routing zone is disposed on the antenna zone, where the antenna zone includes a first insulation layer and two or more second insulation layer and a thickness of the first insulation layer is different from that of the second insulation layer.

公开(公告)号：US11127697B2

公开(公告)日：2021-09-21

申请号：US16508219

申请日：2019-07-10

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen Hung Huang ,  Yan Wen Chung ,  Wei Chu Sun

IPC: H01L23/48 ,  H01L29/40 ,  H01L23/66 ,  H01L23/498 ,  H01L23/00

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes an antenna zone and a routing zone. The routing zone is disposed on the antenna zone, where the antenna zone includes a first insulation layer and two or more second insulation layer and a thickness of the first insulation layer is different from that of the second insulation layer.

公开(公告)号：US10468340B2

公开(公告)日：2019-11-05

申请号：US15625920

申请日：2017-06-16

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen Hung Huang ,  Yan Wen Chung ,  Wei Chu Sun

IPC: H01L23/498 ,  H01L23/00

Abstract: The present disclosure relates to a wiring structure and a semiconductor package. The wiring structure comprises a first wiring pattern, a dielectric layer and a dummy structure. The first wiring pattern includes a conductive land having a width W1 and a surface area A, and a conductive trace having a width W2 and electrically connected to the conductive land, wherein ((W1*W2)/A)*100%≤ about 25%. The dielectric layer covers the first wiring pattern, and the dummy structure is adjacent to the conductive trace.