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公开(公告)号:US10573624B2
公开(公告)日:2020-02-25
申请号:US16194265
申请日:2018-11-16
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Tien-Szu Chen , Kuang-Hsiung Chen , Sheng-Ming Wang , I-Cheng Wang , Wun-Jheng Syu
IPC: H01L25/065 , H01L23/31 , H01L23/29 , H01L23/24 , H01L25/00 , H01L21/48 , H01L21/56 , H01L23/00 , H01L21/683 , H01L23/538 , H01L23/498
Abstract: A semiconductor device package includes: (1) a first circuit layer including a first surface and a second surface opposite to the first surface; (2) at least one electrical element disposed over the first surface of the first circuit layer and electrically connected to the first circuit layer; (3) a first molding layer disposed over the first surface of the first circuit layer, wherein the first molding layer encapsulates an edge of the at least one electrical element; (4) first electronic components disposed over the second surface of the first circuit layer and electrically connected to the first circuit layer; and (5) a second molding layer disposed over the second surface of the first circuit layer and encapsulating the first electronic components, wherein the first molding layer and the second molding layer include different molding materials.
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公开(公告)号:US10134683B2
公开(公告)日:2018-11-20
申请号:US15430355
申请日:2017-02-10
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Tien-Szu Chen , Kuang-Hsiung Chen , Sheng-Ming Wang , I-Cheng Wang , Wun-Jheng Syu , Yu-Tzu Peng
IPC: H01L23/552 , H01L23/31 , H01L23/367 , H01L23/29 , H01L25/065 , H01L23/538 , H01L21/56 , H01L21/768 , H01L21/683 , H01L25/00 , H01L25/10
Abstract: A semiconductor device package includes a first circuit layer having a first surface and a second surface opposite the first side, a first electronic component, a shielding element, a shielding layer and a molding layer. The first electronic component is disposed over the first surface of the first circuit layer, and electrically connected to the first circuit layer. The shielding element is disposed over the first surface of the first circuit layer, and is electrically connected to the first circuit layer. The shielding element is disposed adjacent to at least one side of the first electronic component. The shielding layer is disposed over the first electronic component and the shielding element, and the shielding layer is electrically connected to the shielding element. The molding layer encapsulates the first electronic component, the shielding element and a portion of the shielding layer.
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公开(公告)号:US10734337B2
公开(公告)日:2020-08-04
申请号:US16293606
申请日:2019-03-05
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Kuang-Hsiung Chen , Yu-Hsuan Tsai , Yu-Ying Lee , Sheng-Ming Wang , Wun-Jheng Syu
Abstract: A micro-electromechanical systems (MEMS) package structure includes: (1) a circuit layer; (2) a MEMS die with an active surface, wherein the active surface faces the circuit layer; (3) a conductive pillar adjacent to the MEMS die; and (4) a package body encapsulating the MEMS die and the conductive pillar, and exposing a top surface of the conductive pillar.
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公开(公告)号:US10224298B2
公开(公告)日:2019-03-05
申请号:US15649474
申请日:2017-07-13
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Kuang-Hsiung Chen , Yu-Hsuan Tsai , Yu-Ying Lee , Sheng-Ming Wang , Wun-Jheng Syu
Abstract: In one or more embodiments, a micro-electromechanical systems (MEMS) package structure comprises a MEMS die, a conductive pillar adjacent to the MEMS die, a package body and a binding layer on the package body. The package body encapsulates the MEMS die and the conductive pillar, and exposes a top surface of the conductive pillar. A glass transition temperature (Tg) of the package body is greater than a temperature for forming the binding layer (Tc).
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公开(公告)号:US10157887B2
公开(公告)日:2018-12-18
申请号:US15454520
申请日:2017-03-09
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Tien-Szu Chen , Kuang-Hsiung Chen , Sheng-Ming Wang , I-Cheng Wang , Wun-Jheng Syu
IPC: H01L23/28 , H01L23/48 , H01L23/528 , H01L21/56 , H01L25/065 , H01L23/31 , H01L23/498 , H01L23/29 , H01L23/24 , H01L25/00 , H01L21/48
Abstract: A semiconductor device package includes a first circuit layer, at least one electrical element, a first molding layer, an electronic component and a second molding layer. The at least one electrical element is disposed over a first surface of the first circuit layer and electrically connected to the first circuit layer. The first molding layer is disposed over the first surface of the first circuit layer. The first molding layer encapsulates an edge of the at least one electrical element, and a lower surface of the first molding layer and a lower surface of the at least one electrical element are substantially coplanar. The electronic component is disposed over a second surface of the first circuit layer and is electrically connected to the first circuit layer. The second molding layer is disposed over the second surface of the first circuit layer and encapsulates the electronic component.
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