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公开(公告)号:US20150110845A1
公开(公告)日:2015-04-23
申请号:US14511240
申请日:2014-10-10
Applicant: Agency for Science, Technology and Research
Inventor: Yen Nee Tan , Yuan Chong Jason Lim , Chao Wang , Lian Hui Zhang
IPC: A61K33/38 , A01N59/16 , A61K9/00 , A61K31/7088 , A61K31/713 , A61K9/14 , A01N43/90 , A01N25/26
CPC classification number: A61K9/0014 , A01N59/16 , A61K9/5153 , A61K31/7088 , A61K31/713 , A61K31/7135 , B82Y5/00 , A01N43/90
Abstract: There is provided a polynucleotide-templated metal nanocluster for use in therapy. There is also provided use of a polynucleotide-templated metal nanocluster in the manufacture of a medicament for prophylactically or therapeutically treating a microbial infection as well as a method of prophylactically or therapeutically treating a microbial infection comprising administering to a subject a polynucleotide-templated metal nanocluster. There is also provided an antimicrobial agent comprising a polynucleotide-templated metal nanocluster.
Abstract translation: 提供了用于治疗的多核苷酸模板化金属纳米团簇。 还提供了多核苷酸模板化的金属纳米簇在制备用于预防或治疗微生物感染的药物中的用途以及预防或治疗性治疗微生物感染的方法,包括向受试者施用多核苷酸模板化的金属纳米簇 。 还提供了包含多核苷酸模板化的金属纳米簇的抗微生物剂。
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公开(公告)号:US09374090B2
公开(公告)日:2016-06-21
申请号:US14895758
申请日:2014-06-04
Applicant: Agency for Science, Technology and Research
IPC: H03K19/00 , H03K19/0175
CPC classification number: H03K19/0013 , H03K3/356165 , H03K3/356182 , H03K19/017509
Abstract: A circuit arrangement may be provided including a level shifting stage configured to be coupled to a first reference voltage and a second reference voltage. The circuit arrangement may also include a first input electrode in electrical connection with the level shifting stage for coupling a first input voltage and a second input electrode in electrical connection with the level shifting stage for coupling a second input voltage. The level shifting stage may be configured to generate an output voltage above a predetermined output level at the output node due to the first reference voltage when the first input voltage is in the first logic state and the second input voltage is in the second logic state. The circuit arrangement may also include a feedback circuit coupled to the output stage and the level shifting stage and a voltage stabilization circuit coupled to the level shifting stage.
Abstract translation: 可以提供电路装置,其包括电平移位级,配置为耦合到第一参考电压和第二参考电压。 电路装置还可以包括与电平移位级电连接的用于耦合第一输入电压的第一输入电极和与电平移位级电连接的用于耦合第二输入电压的第二输入电极。 电平移位级可以被配置为当第一输入电压处于第一逻辑状态并且第二输入电压处于第二逻辑状态时,由于第一参考电压而在输出节点处产生高于预定输出电平的输出电压。 电路装置还可以包括耦合到输出级和电平移位级的反馈电路以及耦合到电平转换级的稳压电路。
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公开(公告)号:US20160118985A1
公开(公告)日:2016-04-28
申请号:US14895758
申请日:2014-06-04
Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH
IPC: H03K19/00 , H03K19/0175
CPC classification number: H03K19/0013 , H03K3/356165 , H03K3/356182 , H03K19/017509
Abstract: A circuit arrangement may be provided including a level shifting stage configured to be coupled to a first reference voltage and a second reference voltage. The circuit arrangement may also include a first input electrode in electrical connection with the level shifting stage for coupling a first input voltage and a second input electrode in electrical connection with the level shifting stage for coupling a second input voltage. The level shifting stage may be configured to generate an output voltage above a predetermined output level at the output node due to the first reference voltage when the first input voltage is in the first logic state and the second input voltage is in the second logic state. The circuit arrangement may also include a feedback circuit coupled to the output stage and the level shifting stage and a voltage stabilization circuit coupled to the level shifting stage.
Abstract translation: 可以提供电路装置,其包括电平移位级,配置为耦合到第一参考电压和第二参考电压。 电路装置还可以包括与电平移位级电连接的用于耦合第一输入电压的第一输入电极和与电平移位级电连接的用于耦合第二输入电压的第二输入电极。 电平移位级可以被配置为当第一输入电压处于第一逻辑状态并且第二输入电压处于第二逻辑状态时,由于第一参考电压,在输出节点处产生高于预定输出电平的输出电压。 电路装置还可以包括耦合到输出级和电平移位级的反馈电路以及耦合到电平转换级的稳压电路。
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