公开(公告)号：US20150016048A1

公开(公告)日：2015-01-15

申请号：US14329913

申请日：2014-07-12

Applicant: Agency for Science, Technology and Research

Inventor： Kok Leong Chang ,  Jie Zhang ,  Weng Yew Lee

IPC: H05K1/14 ,  H05K3/12 ,  H05K3/36

CPC classification number: H03K5/05 ,  H05K1/0248 ,  H05K1/0393 ,  H05K1/095 ,  H05K1/16 ,  Y10T29/49126

Abstract: In various embodiments, a printed circuit arrangement may be provided. The printed circuit arrangement may include a processor circuit. The printed circuit arrangement may further include a printed main circuit arrangement in electrical connection with a first input node of the processor circuit. The printed main circuit arrangement may be configured to receive at least one input signal and generate a main circuit signal based on the at least one input signal after a first delay from receiving the at least one input signal. The printed circuit arrangement may further include a printed reference circuit arrangement in electrical connection with a second input node of the processor circuit. The printed reference circuit arrangement may be configured to receive a further input signal, may have a second delay and may be configured such that the second delay adapts to the first delay.

Abstract translation: 在各种实施例中，可以提供印刷电路装置。 印刷电路装置可以包括处理器电路。 印刷电路装置还可以包括与处理器电路的第一输入节点电连接的印刷主电路装置。 打印的主电路装置可以被配置为在接收到至少一个输入信号之后的第一延迟之后基于至少一个输入信号接收至少一个输入信号并产生主电路信号。 印刷电路装置还可以包括与处理器电路的第二输入节点电连接的印刷参考电路装置。 印刷的参考电路装置可以被配置为接收另外的输入信号，可以具有第二延迟并且可以被配置为使得第二延迟适应于第一延迟。

公开(公告)号：US09577620B2

公开(公告)日：2017-02-21

申请号：US14329913

申请日：2014-07-12

Applicant: Agency for Science, Technology and Research

Inventor： Kok Leong Chang ,  Jie Zhang ,  Weng Yew Lee

IPC: G06F7/00 ,  H05K5/00 ,  H01H9/00 ,  H04L7/00 ,  H03H11/26 ,  H03K5/05 ,  H05K1/02 ,  H05K1/03 ,  H05K1/09 ,  H05K1/16

CPC classification number: H03K5/05 ,  H05K1/0248 ,  H05K1/0393 ,  H05K1/095 ,  H05K1/16 ,  Y10T29/49126

Abstract: In various embodiments, a printed circuit arrangement may be provided. The printed circuit arrangement may include a processor circuit. The printed circuit arrangement may further include a printed main circuit arrangement in electrical connection with a first input node of the processor circuit. The printed main circuit arrangement may be configured to receive at least one input signal and generate a main circuit signal based on the at least one input signal after a first delay from receiving the at least one input signal. The printed circuit arrangement may further include a printed reference circuit arrangement in electrical connection with a second input node of the processor circuit. The printed reference circuit arrangement may be configured to receive a further input signal, may have a second delay and may be configured such that the second delay adapts to the first delay.

Abstract translation: 在各种实施例中，可以提供印刷电路装置。 印刷电路装置可以包括处理器电路。 印刷电路装置还可以包括与处理器电路的第一输入节点电连接的印刷主电路装置。 印刷的主电路装置可以被配置为在接收到至少一个输入信号之后的第一延迟之后基于至少一个输入信号接收至少一个输入信号并产生主电路信号。 印刷电路装置还可以包括与处理器电路的第二输入节点电连接的印刷参考电路装置。 印刷的参考电路装置可以被配置为接收另外的输入信号，可以具有第二延迟并且可以被配置为使得第二延迟适应于第一延迟。