公开(公告)号：US08410910B2

公开(公告)日：2013-04-02

申请号：US12043691

申请日：2008-03-06

申请人： David Naura ,  Christophe Moreaux ,  Ahmed Kari ,  Pierre Rizzo

发明人： David Naura ,  Christophe Moreaux ,  Ahmed Kari ,  Pierre Rizzo

IPC分类号： H04Q5/22

CPC分类号： G06K19/0723 ,  G06K19/0713 ,  G11C5/142 ,  G11C16/10 ,  G11C16/30

摘要： A passive contactless integrated circuit includes an electrically programmable non-volatile data memory (MEM), a charge accumulation booster circuit for supplying a high voltage necessary for writing data in the memory. The integrated circuit includes a volatile memory point for memorizing an indicator flag, and circuitry for modifying the value of the indicator flag when the high voltage reaches a critical threshold for the first time after activating the booster circuit.

摘要翻译： 无源非接触集成电路包括电可编程非易失性数据存储器（MEM），电荷累积升压电路，用于提供将数据写入存储器所需的高电压。 集成电路包括用于存储指示符标志的易失性存储点，以及用于在激活升压电路之后第一次高电压达到临界阈值时修改指示符标志值的电路。

公开(公告)号：US07602878B2

公开(公告)日：2009-10-13

申请号：US12141798

申请日：2008-06-18

申请人： Christophe Moreaux ,  Ahmed Kari ,  David Naura ,  Pierre Rizzo

发明人： Christophe Moreaux ,  Ahmed Kari ,  David Naura ,  Pierre Rizzo

IPC分类号： H03K21/00

CPC分类号： H03K23/66

摘要： A binary frequency divider includes a counter paced by an input signal, means for comparing a counting value with first and second threshold values and supplying first and second control signals synchronized with variation edges of a first type of the input signal. The divider includes means for supplying at least one third control signal shifted by a half-period of the input signal in relation to one of the first or second control signals, and control means for generating the output signal using control signals chosen according to the value of at least one least significant bit of the division setpoint. Application is mainly but not exclusively to UHF transponders.

摘要翻译： 二进制分频器包括由输入信号起搏的计数器，用于将计数值与第一和第二阈值进行比较并提供与第一类型的输入信号的变化沿同步的第一和第二控制信号的装置。 分频器包括用于提供相对于第一或第二控制信号之一移位了输入信号的半周期的至少一个第三控制信号的装置，以及使用根据该值选择的控制信号产生输出信号的控制装置 的分区设定点的至少一个最低有效位。 应用主要但不仅限于UHF应答器。

公开(公告)号：US07436702B2

公开(公告)日：2008-10-14

申请号：US11469351

申请日：2006-08-31

申请人： David Naura ,  Christophe Moreaux ,  Ahmed Kari ,  Pierre Rizzo

发明人： David Naura ,  Christophe Moreaux ,  Ahmed Kari ,  Pierre Rizzo

IPC分类号： G11C11/34

CPC分类号： G11C16/22

摘要： A method protects against a global data erasure an integrated circuit comprising an electrically programmable data memory and a control unit to execute commands for reading or writing in the memory. The method includes the steps of providing, in the integrated circuit, electrically programmable reference memory cells, at putting the integrated circuit into service, storing, in the reference memory cells, bits of determined value forming an authorized combination of bits and, during the operation of the integrated circuit following its putting into service, reading and evaluating the reference memory cells and blocking the integrated circuit if the reference memory cells contain a forbidden combination of bits different from the authorized combination.

摘要翻译： 一种防止全局数据擦除的集成电路的方法，该集成电路包括电可编程数据存储器和控制单元，以执行用于读取或写入存储器的命令。 该方法包括以下步骤：在集成电路中提供电可编程参考存储器单元，在将集成电路投入使用时，在参考存储器单元中存储形成授权的位组合的确定值的位，并且在操作期间 如果参考存储器单元包含与授权组合不同的位的禁止组合，则集成电路在其投入使用之后，读取和评估参考存储器单元并阻塞集成电路。

公开(公告)号：US20070153581A1

公开(公告)日：2007-07-05

申请号：US11610628

申请日：2006-12-14

申请人： Ahmed Kari ,  Christophe Moreaux ,  David Naura ,  Pierre Rizzo

发明人： Ahmed Kari ,  Christophe Moreaux ,  David Naura ,  Pierre Rizzo

IPC分类号： G11C11/34

CPC分类号： G11C16/349

摘要： A method for executing a write command for writing a binary word in a programmable memory, comprises writing each of the bits in a programmed state of a binary word to be written in a corresponding memory cell of the memory, reading each bit of the word written in the memory corresponding to a bit in the programmed state of the word to be written, comparing each bit in the programmed state of the word to be written with a corresponding bit read in the memory, and generating an error signal if at least one bit of the word to be written in the programmed state is different from the corresponding bit read. Application of the method can be particularly but not exclusively to integrated circuits for chip cards.

摘要翻译： 一种用于执行用于在可编程存储器中写入二进制字的写入命令的方法，包括将要写入存储器的相应存储器单元的二进制字的编程状态中的每一位写入，读取写入的字的每个位 在对应于要写入的字的编程状态中的位的存储器中，将要写入的字的编程状态中的每个比特与在存储器中读取的相应位进行比较，并且如果至少一个位 要写入编程状态的字与相应的位读取不同。 该方法的应用可以特别地但不排他地用于芯片卡的集成电路。

公开(公告)号：US20070053233A1

公开(公告)日：2007-03-08

申请号：US11468257

申请日：2006-08-29

申请人： David Naura ,  Christophe Moreaux ,  Ahmed Kari ,  Pierre Rizzo

发明人： David Naura ,  Christophe Moreaux ,  Ahmed Kari ,  Pierre Rizzo

IPC分类号： G11C7/00

CPC分类号： G11C16/344 ,  G11C16/0433

摘要： A method checks the state of a set of memory cells of a memory comprising memory cells arranged in a memory array, means for selecting a memory cell, and a sense amplifier for supplying a state of the selected memory cell depending on whether the selected memory cell is conductive or non-conductive. The method includes features wherein all the memory cells of a set grouping together several memory cells are selected, and then simultaneously coupled to the sense amplifier, and the sense amplifier supplies a global state of all the selected memory cells to which it is coupled, if the latter are simultaneously non-conductive. Application is provided to the checking of a command for block-erasing a memory.

摘要翻译： 一种方法检查包括存储器阵列中布置的存储单元的存储器组的集合的状态，用于选择存储单元的装置以及用于根据所选存储单元是否提供所选存储单元的状态的读出放大器 是导电或不导电的。 该方法包括其中选择分组在一起的几个存储器单元的集合的所有存储单元，然后同时耦合到读出放大器的特征，并且读出放大器提供与其耦合到的所有选定存储单元的全局状态，如果 后者同时不导电。 提供了用于检查用于块擦除存储器的命令的应用。

公开(公告)号：US07881124B2

公开(公告)日：2011-02-01

申请号：US12061086

申请日：2008-04-02

申请人： Ahmed Kari ,  Christophe Moreaux ,  David Naura ,  Pierre Rizzo

发明人： Ahmed Kari ,  Christophe Moreaux ,  David Naura ,  Pierre Rizzo

IPC分类号： G11C16/04

CPC分类号： G11C16/10

摘要： A method is provided for block writing in an electrically programmable non-volatile memory, in which a block to be written in the memory includes at least one word. The method includes determining a word write time by dividing a fixed block write time by the number of words in the block to be written, and controlling the memory to successively write each word in the memory during the write time.

摘要翻译： 提供了一种用于在电可编程非易失性存储器中进行块写入的方法，其中要写入存储器的块包括至少一个字。 该方法包括通过将固定块写入时间除以要写入的块中的字数来确定字写入时间，并且控制存储器以在写入时间期间连续写入存储器中的每个字。

公开(公告)号：US20090066483A1

公开(公告)日：2009-03-12

申请号：US12043691

申请日：2008-03-06

申请人： David Naura ,  Christophe Moreaux ,  Ahmed Kari ,  Pierre Rizzo

发明人： David Naura ,  Christophe Moreaux ,  Ahmed Kari ,  Pierre Rizzo

IPC分类号： H04Q5/22

CPC分类号： G06K19/0723 ,  G06K19/0713 ,  G11C5/142 ,  G11C16/10 ,  G11C16/30

摘要： A passive contactless integrated circuit includes an electrically programmable non-volatile data memory (MEM), a charge accumulation booster circuit for supplying a high voltage necessary for writing data in the memory. The integrated circuit includes a volatile memory point for memorizing an indicator flag, and circuitry for modifying the value of the indicator flag when the high voltage reaches a critical threshold for the first time after activating the booster circuit.

摘要翻译： 无源非接触集成电路包括电可编程非易失性数据存储器（MEM），电荷累积升压电路，用于提供将数据写入存储器所需的高电压。 集成电路包括用于存储指示符标志的易失性存储点，以及用于在激活升压电路之后第一次高电压达到临界阈值时修改指示符标志值的电路。

公开(公告)号：US20090022260A1

公开(公告)日：2009-01-22

申请号：US12141798

申请日：2008-06-18

申请人： Christophe Moreaux ,  Ahmed Kari ,  David Naura ,  Pierre Rizzo

发明人： Christophe Moreaux ,  Ahmed Kari ,  David Naura ,  Pierre Rizzo

IPC分类号： H03K21/00 ,  G06F7/52

CPC分类号： H03K23/66

摘要： A binary frequency divider includes a counter paced by an input signal, means for comparing a counting value with first and second threshold values and supplying first and second control signals synchronized with variation edges of a first type of the input signal. The divider includes means for supplying at least one third control signal shifted by a half-period of the input signal in relation to one of the first or second control signals, and control means for generating the output signal using control signals chosen according to the value of at least one least significant bit of the division setpoint. Application is mainly but not exclusively to UHF transponders.

摘要翻译： 二进制分频器包括由输入信号起搏的计数器，用于将计数值与第一和第二阈值进行比较并提供与第一类型的输入信号的变化沿同步的第一和第二控制信号的装置。 分频器包括用于提供相对于第一或第二控制信号之一移位了输入信号的半周期的至少一个第三控制信号的装置，以及使用根据该值选择的控制信号产生输出信号的控制装置 的分区设定点的至少一个最低有效位。 应用主要但不仅限于UHF应答器。

公开(公告)号：US20080212346A1

公开(公告)日：2008-09-04

申请号：US12038513

申请日：2008-02-27

申请人： Pierre Rizzo ,  Christophe Moreaux ,  David Naura ,  Ahmed Kari

发明人： Pierre Rizzo ,  Christophe Moreaux ,  David Naura ,  Ahmed Kari

IPC分类号： H02M3/18

CPC分类号： G06K19/0713 ,  G06K19/0723

摘要： A method for modulating the impedance of an antenna circuit supplying pump signals to a charge pump comprising at least one first pump stage and one last pump stage, the last pump stage supplying a continuous voltage. The output of the first pump stage is short-circuited by means of a switch and the last pump stage goes on pumping electric charges and supplying the continuous voltage. Application in particular to RFID passive transponders.

摘要翻译： 一种用于调制向包括至少一个第一泵级和最后一个泵级的电荷泵提供泵信号的天线电路的阻抗调制方法，所述最后泵级提供连续电压。 第一个泵级的输出通过一个开关短路，最后一个泵级继续泵送电荷并提供连续电压。 特别适用于RFID无源应答器。

公开(公告)号：US20080211562A1

公开(公告)日：2008-09-04

申请号：US12041449

申请日：2008-03-03

申请人： Christophe Moreaux ,  Ahmed Kari ,  David Naura ,  Pierre Rizzo

发明人： Christophe Moreaux ,  Ahmed Kari ,  David Naura ,  Pierre Rizzo

IPC分类号： H03K3/013

CPC分类号： H03L7/00 ,  H04L7/0331 ,  H04L7/04

摘要： A method and device for generating a clock signal, the method including measuring, using a first clock signal, a characteristic of a reference event in a received signal, determining, using the first clock signal, a variation of a characteristic of a second event in a received signal, correcting the measurement according to the variation of the characteristic of the second event, and generating a second clock signal using the first clock signal according to the corrected measurement.

摘要翻译： 一种用于产生时钟信号的方法和装置，所述方法包括使用第一时钟信号测量接收信号中的参考事件的特性，使用第一时钟信号确定第二事件的特性的变化 接收信号，根据第二事件的特性的变化来校正测量值，并根据校正的测量值使用第一时钟信号产生第二时钟信号。