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公开(公告)号:US4305136A
公开(公告)日:1981-12-08
申请号:US94158
申请日:1979-11-14
申请人: Alfonso Albani , Ermanno Maccario
发明人: Alfonso Albani , Ermanno Maccario
IPC分类号: G06F11/277 , G06F5/00
CPC分类号: G06F11/277
摘要: A method of symptom compression involves a symptom compression device receiving binary coded information including bits signifying symptoms present in the course of each operating cycle at selected points in an integrated logical network, microprocessor or the like. The device includes a first register, a second shift register, an EXCLUSIVE OR logic network, and a display. The binary coded information is received on parallel inputs of the first register and applied from parallel outputs of the first register to a set of inputs of the EXCLUSIVE OR network, a second set of inputs which is connected to at least some parallel outputs from the second shift register. A set of outputs from the EXCLUSIVE OR network is connected to parallel inputs of the second shift register. In each cycle, the bits in the second shift register, which accumulate information representative of symptoms, are shifted in one direction and are recirculated. The display is connected to the parallel outputs from the second shift register. In a second embodiment, a third shift register receives the output from the EXCLUSIVE OR network. A multiplexor selectively applies signals from the outputs of the second or third shift register to the second set of inputs. The bits in the third shift register, which also accumulate information as to symptoms, are shifted in the opposite direction. A second display is connected to the outputs of the third shift register.
摘要翻译: 症状压缩的方法涉及症状压缩装置,其接收二进制编码信息,包括在集成逻辑网络,微处理器等中的选定点处的每个操作周期中存在的症状。 该装置包括第一寄存器,第二移位寄存器,EXCLUSIVE OR逻辑网络和显示器。 二进制编码信息在第一寄存器的并行输入上被接收并从第一寄存器的并行输出施加到EXCLUSIVE OR网络的一组输入,第二组输入连接到来自第二寄存器的至少一些并行输出 移位寄存器 来自EXCLUSIVE OR网络的一组输出连接到第二移位寄存器的并行输入。 在每个周期中,积累代表症状的信息的第二移位寄存器中的位在一个方向上移位并被再循环。 显示器连接到来自第二移位寄存器的并行输出。 在第二实施例中,第三移位寄存器接收来自EXCLUSIVE OR网络的输出。 复用器选择性地将来自第二或第三移位寄存器的输出的信号施加到第二组输入。 第三移位寄存器中的积累有关症状的信息的位也向相反方向移动。 第二显示器连接到第三移位寄存器的输出。
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公开(公告)号:US4198682A
公开(公告)日:1980-04-15
申请号:US863463
申请日:1977-12-22
申请人: Alfonso Albani , Ermanno Maccario
发明人: Alfonso Albani , Ermanno Maccario
IPC分类号: G06F11/277 , G06F5/00
CPC分类号: G06F11/277
摘要: A symptom compression device receives binary coded information including bits signifying symptoms present in the course of each operating cycle at selected points in an integrated logical network, microprocessor or the like. The device includes a first register, a second shift register, an EXCLUSIVE OR logic network, and a display. The binary coded information is received on parallel inputs of the first register and applied from parallel outputs of the first register to a set of inputs of the EXCLUSIVE OR network, a second set of inputs which is connected to at least some parallel outputs from the second shift register. A set of outputs from the EXCLUSIVE OR network is connected to parallel inputs of the second shift register. In each cycle, the bits in the second shift register, which accumulate information representative of symptoms, are shifted in one direction and are recirculated. The display is connected to the parallel outputs from the second shift register. In a second embodiment, a third shift register receives the output from the EXCLUSIVE OR network. A multiplexor selectively applies signals from the outputs of the second or third shift register to the second set of inputs. The bits in the third shift register, which also accumulate information as to symptoms, are shifted in the opposite direction. A second display is connected to the outputs of the third shift register.
摘要翻译: 症状压缩装置接收二进制编码信息,包括表示在集成逻辑网络,微处理器等中的选定点的每个操作周期中存在的症状的位。 该装置包括第一寄存器,第二移位寄存器,EXCLUSIVE OR逻辑网络和显示器。 二进制编码信息在第一寄存器的并行输入端被接收,并从第一寄存器的并行输出端施加到EXCLUSIVE OR网络的一组输入端,第二组输入端连接到来自第二寄存器的至少一些并行输出端 移位寄存器 来自EXCLUSIVE OR网络的一组输出连接到第二移位寄存器的并行输入。 在每个周期中,积累代表症状的信息的第二移位寄存器中的位在一个方向上移位并被再循环。 显示器连接到来自第二移位寄存器的并行输出。 在第二实施例中,第三移位寄存器接收来自EXCLUSIVE OR网络的输出。 复用器选择性地将来自第二或第三移位寄存器的输出的信号施加到第二组输入。 第三移位寄存器中的积累有关症状的信息的位也向相反方向移动。 第二显示器连接到第三移位寄存器的输出。
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公开(公告)号:US3972033A
公开(公告)日:1976-07-27
申请号:US535751
申请日:1974-12-23
申请人: Ezio Cislaghi , Claudio Gentili , Ermanno Maccario
发明人: Ezio Cislaghi , Claudio Gentili , Ermanno Maccario
CPC分类号: G06F11/1016 , G06F11/1032
摘要: A semiconductor memory includes means for separating the causes of error affecting the addressing and recording of information bits from those affecting check, or parity, bits. The recording words comprise 16 information bits, and are divided into two "bytes", of eight bits each. Each byte is provided with its own check bit; and two half-words of nine bits are recorded at the same address. Each submodule of the memory comprises two printed-circuit cards. The first card supports the integrated memory units wherein, for each word, the information bits of the first byte and the check bit of the second byte are recorded; the second card supports the memory units wherein the information bits of the second byte and the check bit of the first byte are recorded. Since an error cause affecting the control or the addressing circuits mounted on a card does not affect the recording and the addressing circuits of the second card, the recording or addressing of the information bits on one card will differ from the recording and addressing of the related check bit on the other card. Both bytes may be written or read out separately; and the writing or the reading-out signals of the information bits are independent from the writing or reading-out signal of the related check bits for both cards.
摘要翻译: 半导体存储器包括用于分离影响信息位的寻址和记录的原因与影响检查或奇偶校验的那些的原因的装置。 记录字包括16个信息位,并被分成两个“字节”,每个字节为8位。 每个字节都有自己的检查位; 并且在相同的地址记录了两个九位的半字。 存储器的每个子模块包括两个印刷电路卡。 第一卡支持集成存储器单元,其中对于每个字,记录第一字节的信息位和第二字节的校验位; 第二卡支持其中记录第二字节的信息位和第一字节的校验位的存储单元。 由于影响安装在卡上的控制或寻址电路的错误不会影响第二张卡的记录和寻址电路,所以一张卡上的信息位的记录或寻址将不同于相关的记录和寻址 检查另一张卡上的位。 两个字节可以单独写入或读出; 并且信息位的写入或读出信号独立于两个卡的相关校验位的写入或读出信号。
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