摘要:
A system comprises an implantable medical device (IMD). The IMD includes at least one electrical input to receive sensed electrical activity of a heart and a sampler circuit coupled to the at least one electrical input. The sampler circuit generates sampled values of the sensed electrical activity. The IMD includes a clock circuit that generates readable values representative of absolute time. The IMD also includes a controller circuit coupled to the sampler circuit and the clock circuit. The controller circuit processes the sampled values and generate at least one marker to indicate a detected event related to the electrical activity. The controller circuit also stores a timestamp of absolute time of the detected event with the at least one marker in memory.
摘要:
A pacing monitoring system is described for incorporation in an implantable pacemaker that monitors the pacing rate and/or cumulative pace count in order to protect a patient from excessive pacing. The system includes monitoring circuitry that is configured to operate in multiple monitoring zones, where each zone is adapted to prevent excessively high-rate pacing during a particular mode of device operation.
摘要:
This document discusses, among other things, n implantable device comprising a communication circuit configured to communicate with an external device, a logic circuit communicatively coupled to the communication circuit, and a processor, communicatively coupled to the logic circuit and the communication circuit. The processor is configured to communicate information with the external device, via the communication circuit and the logic circuit, using a set of communication messages. While in a device safety mode, the processor is held in an inactive state and the logic circuit is configured to communicate with the external device using a subset of the set of communication messages.
摘要:
A system and method is disclosed for system fault recovery by an implantable medical device which employs a global fault response. The system enables the device to consistently recover from transient faults while maintaining a history of the reason for the device fault. Upon detection of a fault, the primary controller of the device signals a reset controller which then issues a reset command. All sub-systems of the primary device controller are then reset together rather than resetting individual sub-systems independently to ensure deterministic behavior.
摘要:
An implantable device, such as a pacer, defibrillator, or other cardiac rhythm management device, can include a failsafe backup, such as a separate and independent safety core that can assume control over operation of the implantable device from a primary controller. In an example, the safety core can include a normal first safety core operating mode and a magnetic resonance imaging (MRI) second safety core operating mode that can provide different functionality from the normal first safety core operating mode.
摘要:
Embodiments of the invention are related to medical systems and methods for controlling authorization of restricted functionality, amongst other things. In an embodiment, the invention includes a medical system including an external medical device programmer comprising control circuitry and a wireless communications module for sending instructions selected from a set of instructions wirelessly to a specific implanted medical device. In an embodiment, the external medical device programmer can be configured to initiate a transfer of verifying data to a remote key authority requesting permission if the user input directs delivery of restricted instructions to the specific implanted medical device, the verifying data including information regarding the specific implanted medical device. Other embodiments are also included herein.
摘要:
A pacing monitoring system is described for incorporation in an implantable pacemaker that monitors the pacing rate and/or cumulative pace count in order to protect a patient from excessive pacing. The system includes monitoring circuitry that is configured to operate in multiple monitoring zones, where each zone is adapted to prevent excessively high-rate pacing during a particular mode of device operation.
摘要:
This document discusses, among other things, an implantable device comprising a communication circuit configured to communicate with an external device, a logic circuit communicatively coupled to the communication circuit, and a processor, communicatively coupled to the logic circuit and the communication circuit. The processor is configured to communicate information with the external device, via the communication circuit and the logic circuit, using a set of communication messages. While in a device safety mode, the processor is held in an inactive state and the logic circuit is configured to communicate with the external device using a subset of the set of communication messages.
摘要:
Embodiments herein generally relate to implantable medical devices and, specifically, to a system and method for providing fault tolerant processing in an implantable medical device. In an embodiment a system for providing fault tolerant processing in an implantable medical device is provided. The system can include an implantable medical device comprising a processor and memory store configured to execute a plurality of threads, temporal and spatial constraints assigned to one or more of the threads, and a kernel. The kernel can include a scheduler and a thread monitor configured to monitor execution of threads against the temporal and spatial constraints, and further configured to issue a response upon violation of either of the constraints by one of the plurality of threads. In an embodiment a method for providing fault tolerant processing in an implantable medical device is provided. Other embodiments are also included herein.
摘要:
A system and method is disclosed by which an implantable cardiac device may deliver tachyarrhythmia therapy in the event of a system fault. A hardware-based safety core provides the logic circuitry for detecting tachyarrhythmias and delivering shock therapy in the event of a fault which disables operation of the device's primary control circuitry. The safety core defibrillator eliminates common mode failure of the primary control circuits used in the primary defibrillator system. Failures in the primary controller memory or execution will activate the safety core defibrillator.