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公开(公告)号:US20170141225A1
公开(公告)日:2017-05-18
申请号:US14852521
申请日:2015-09-12
Applicant: Alpha and Omega Semiconductor Incorporated
Inventor: Shekar Mallikarjunaswamy , John Chen , Yongzhong Hu
IPC: H01L29/78 , H01L29/161 , H01L29/66 , H01L29/06 , H01L29/417
CPC classification number: H01L29/7835 , H01L29/0692 , H01L29/1083 , H01L29/161 , H01L29/402 , H01L29/4175 , H01L29/41766 , H01L29/456 , H01L29/66659 , H01L29/66681
Abstract: In an embodiment, this invention discloses a top-drain lateral diffusion metal oxide field effect semiconductor (TD-LDMOS) device supported on a semiconductor substrate. The TD-LDMOS includes a source electrode disposed on a bottom surface of the semiconductor substrate. The TD-LDMOS further includes a source region and a drain region disposed on two opposite sides of a planar gate disposed on a top surface of the semiconductor substrate wherein the source region is encompassed in a body region constituting a drift region as a lateral current channel between the source region and drain region under the planar gate. The TD-LDMOS further includes at least a trench filled with a conductive material and extending vertically from the body region near the top surface downwardly to electrically contact the source electrode disposed on the bottom surface of the semiconductor substrate.
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公开(公告)号:US10008598B2
公开(公告)日:2018-06-26
申请号:US14852521
申请日:2015-09-12
Applicant: Alpha and Omega Semiconductor Incorporated
Inventor: Shekar Mallikarjunaswamy , John Chen , Yongzhong Hu
IPC: H01L29/417 , H01L29/78 , H01L29/06 , H01L29/66 , H01L29/161
CPC classification number: H01L29/7835 , H01L29/0692 , H01L29/1083 , H01L29/161 , H01L29/402 , H01L29/4175 , H01L29/41766 , H01L29/456 , H01L29/66659 , H01L29/66681
Abstract: In an embodiment, this invention discloses a top-drain lateral diffusion metal oxide field effect semiconductor (TD-LDMOS) device supported on a semiconductor substrate. The TD-LDMOS includes a source electrode disposed on a bottom surface of the semiconductor substrate. The TD-LDMOS further includes a source region and a drain region disposed on two opposite sides of a planar gate disposed on a top surface of the semiconductor substrate wherein the source region is encompassed in a body region constituting a drift region as a lateral current channel between the source region and drain region under the planar gate. The TD-LDMOS further includes at least a trench filled with a conductive material and extending vertically from the body region near the top surface downwardly to electrically contact the source electrode disposed on the bottom surface of the semiconductor substrate.
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