Controlling a voltage level of an access signal to reduce access disturbs in semiconductor memories
    1.
    发明授权
    Controlling a voltage level of an access signal to reduce access disturbs in semiconductor memories 有权
    控制接入信号的电压电平以减少半导体存储器中的存取干扰

    公开(公告)号:US08611172B2

    公开(公告)日:2013-12-17

    申请号:US13476218

    申请日:2012-05-21

    IPC分类号: G11C7/00

    CPC分类号: G11C7/02 G11C8/08 G11C11/418

    摘要: A semiconductor memory storage device having a plurality of storage cells for storing data, each storage cell comprising an access control device and access control circuitry. The access control circuitry is configured to respond to a data access request signal to access a selected storage cell connected to a corresponding selected access control line to: control the voltage control switching circuitry to connect the at least one capacitor to the voltage supply line such that the at least one capacitor is charged by the voltage supply line and a voltage level on the voltage supply line is reduced; and to control the access control line switching circuitry to connect the selected access control line to the voltage supply line having the reduced voltage level.

    摘要翻译: 一种具有用于存储数据的多个存储单元的半导体存储器存储装置,每个存储单元包括访问控制装置和访问控制电路。 访问控制电路被配置为响应数据访问请求信号以访问连接到相应的所选访问控制线路的所选择的存储单元,以便:控制电压控制切换电路以将至少一个电容器连接到电压供应线,使得 所述至少一个电容器由所述电压供给线充电,并且所述电压供给线上的电压电平减小; 并且控制访问控制线路切换电路将所选择的访问控制线路连接到具有降低的电压电平的电压供应线路。

    CONTROLLING A VOLTAGE LEVEL OF AN ACCESS SIGNAL TO REDUCE ACCESS DISTURBS IN SEMICONDUCTOR MEMORIES
    2.
    发明申请
    CONTROLLING A VOLTAGE LEVEL OF AN ACCESS SIGNAL TO REDUCE ACCESS DISTURBS IN SEMICONDUCTOR MEMORIES 有权
    控制电源电压降低半导体存储器中的访问干扰

    公开(公告)号:US20130308407A1

    公开(公告)日:2013-11-21

    申请号:US13476218

    申请日:2012-05-21

    IPC分类号: G11C5/14

    CPC分类号: G11C7/02 G11C8/08 G11C11/418

    摘要: A semiconductor memory storage device having a plurality of storage cells for storing data, each storage cell comprising an access control device and access control circuitry. The access control circuitry is configured to respond to a data access request signal to access a selected storage cell connected to a corresponding selected access control line to: control the voltage control switching circuitry to connect the at least one capacitor to the voltage supply line such that the at least one capacitor is charged by the voltage supply line and a voltage level on the voltage supply line is reduced; and to control the access control line switching circuitry to connect the selected access control line to the voltage supply line having the reduced voltage level.

    摘要翻译: 一种具有用于存储数据的多个存储单元的半导体存储器存储装置,每个存储单元包括访问控制装置和访问控制电路。 访问控制电路被配置为响应数据访问请求信号以访问连接到相应的所选访问控制线路的所选择的存储单元,以便:控制电压控制切换电路以将至少一个电容器连接到电压供应线,使得 所述至少一个电容器由所述电压供给线充电,并且所述电压供给线上的电压电平减小; 并且控制访问控制线路切换电路将所选择的访问控制线路连接到具有降低的电压电平的电压供应线路。