System halt support for synchronization pulses

    公开(公告)号:US12050486B1

    公开(公告)日:2024-07-30

    申请号:US17805672

    申请日:2022-06-06

    CPC classification number: G06F1/12

    Abstract: Techniques for cooperative timing alignment using synchronization pulses are described. The techniques can include generating, at an integrated circuit device, a timing signal, controlling a local count value based on the timing signal, monitoring a synchronization signal of a system comprising the integrated circuit device, detecting a synchronization pulse in the synchronization signal, and aligning the local count value with an implied count value associated with the synchronization pulse in order to align the local count value with those of other integrated circuit devices of the system.

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