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公开(公告)号:US20160154023A1
公开(公告)日:2016-06-02
申请号:US14687141
申请日:2015-04-15
发明人: Duk-Soon CHOI , In-Seol HWANG , Woo-Yoel JEONG , Seong-Han PARK , In-Seob KWON , Dong-Shin KIM
CPC分类号: G01R1/0466 , G01R31/2891
摘要: A semiconductor chip testing apparatus is disclosed. The semiconductor chip testing apparatus includes: an upper socket unit which is formed therein with a receiving space receiving an upper semiconductor chip, holds a lower semiconductor chip using a suction airflow passing around the upper semiconductor chip in the receiving space, and electrically connects the lower semiconductor chip to the upper semiconductor chip; a blade block coupled to the upper socket unit to deliver a vacuum pressure for generating the suction airflow in the receiving space; and a lower socket unit on which the lower semiconductor chip held by the upper socket unit is seated, and which is electrically connected to the seated lower semiconductor chip.
摘要翻译: 公开了一种半导体芯片测试装置。 半导体芯片测试装置包括:上插座单元,其中形成有容纳上半导体芯片的接收空间,使用在接收空间中穿过上半导体芯片的吸入气流保持下半导体芯片,并且将下部半导体芯片电连接 半导体芯片到上半导体芯片; 叶片块,其联接到所述上插座单元以递送用于在所述接收空间中产生吸入气流的真空压力; 以及下插座单元,其上由上插座单元保持的下半导体芯片就座在其上,并且电连接到就座的下半导体芯片。