摘要:
A sample and hold circuit including a sampling capacitor for storing a sample of an input signal, an output stage for outputting the sample stored on the sampling capacitor; and input circuitry for sampling the input signal and storing the sample on the sampling capacitor. The input circuitry includes an autozeroing input buffer which selectively samples the input signal during a first operating phase and holds a sample of the input signal during a second operating phase. The autozeroing input buffer cancels any offset error. The input circuitry also includes switching circuitry for selectively coupling the sampling capacitor with an input of the sample and hold circuitry during the second operating phase and to an output of the autozeroing input buffer during the first operating phase.
摘要:
A chopping amplifier and method for chopping an input signal are disclosed. The chopping amplifier and method utilize at least two chopping amplifier stages. A chopping operation of an input signal is segmented across two or more chopping amplifier stages, and the two or more chopping amplifier stages are responsive to a master controller. Chop clock signals of the chopping amplifier stages are staggered so that they have non-overlapping periods and at least one of the chopping amplifier stages is not operating in an open loop at any given time. The non-overlapping periods are periodic so that a master chop clock of the master controller can be operated at a lower chop clock frequency. For every doubling of N number of chopping amplifier stages, magnitudes of chopping artifacts and aliased components are each respectively reduced by 3 dB.
摘要:
A chopping amplifier and method for chopping an input signal are disclosed. The chopping amplifier and method utilize at least two chopping amplifier stages. A chopping operation of an input signal is segmented across two or more chopping amplifier stages, and the two or more chopping amplifier stages are responsive to a master controller. Chop clock signals of the chopping amplifier stages are staggered so that they have non-overlapping periods and at least one of the chopping amplifier stages is not operating in an open loop at any given time. The non-overlapping periods are periodic so that a master chop clock of the master controller can be operated at a lower chop clock frequency. For every doubling of N number of chopping amplifier stages, magnitudes of chopping artifacts and aliased components are each respectively reduced by 3 dB.
摘要:
A chopping amplifier and method for chopping an input signal are disclosed. The chopping amplifier and method utilize at least two chopping amplifier stages. A chopping operation of an input signal is segmented across two or more chopping amplifier stages, and the two or more chopping amplifier stages are responsive to a master controller. Chop clock signals of the chopping amplifier stages are staggered so that they have non-overlapping periods and at least one of the chopping amplifier stages is not operating in an open loop at any given time. The non-overlapping periods are periodic so that a master chop clock of the master controller can be operated at a lower chop clock frequency. For every doubling of N number of chopping amplifier stages, magnitudes of chopping artifacts and aliased components are each respectively reduced by 3 dB.
摘要:
A data converter includes first and second input signal paths receiving an input signal having an input frequency, the first input signal path dividing the input frequency by a first divisor and the second input signal path dividing the input frequency by a second divisor, the second divisor being greater than the first divisor. A selector selects between an output of the first input signal path and an output from the second input signal path in response to a state of a control signal. Control circuitry monitors a selector output signal frequency and a current state of the control signal and selectively resets the state of the control signal to set the selector output frequency to a desired frequency.
摘要:
A power control system and method senses input and/or output voltages of a power supply using sense currents in order for an integrated circuit (IC) switch state controller to generate a control signal to control a switch of the power control system. By sensing sense currents, the power control system can eliminate at least one sense resistor used in a voltage sense system. The sense current(s) can be used to provide power and sensing to the switch state controller. In at least one embodiment, the sense current(s) provide power to the switch state controller when auxiliary IC power is unavailable or diminished, such as during start-up of the IC. In at least one embodiment, the IC draws more sense current from an input of the power control system than the output of the power control system to, for example, minimize impact on the output voltage of the power supply.
摘要:
A boosted auxiliary winding power supply for a switched-power converter circuit provides operating voltage for control and other circuits early in the start-up phase of converter operation. A boost circuit has an input coupled to the auxiliary winding to boost the voltage available from the auxiliary winding at least during start-up of the switched-power converter. The boost thereby provides a voltage that is greater than the voltage across the auxiliary winding during start-up of the switched-power converter. The boost circuit may be actively switched at a rate higher than a switching rate of the switched-power converter, to increase a rate of rise of the operating voltage. Polarity information, which may be provided from the switched-power converter control circuit, can be used to actively rectify the output of the auxiliary winding.
摘要:
A power supply system and method includes a switch state controller that is operational to control a switching power converter during certain power loss conditions that cause conventional switch state controllers to have diminished or no functionality. In at least one embodiment, during certain power loss conditions, such as when an auxiliary power supply is in standby mode or when the switching power converter is not operating, a power supply for the switch state controller does not provide sufficient operating power to the switch state controller during certain power loss conditions. In at least one embodiment, during such power loss conditions power is generated for the switch state controller using sense input and/or sense output currents of the switching power converter to allow an integrated circuit (IC) switch state controller to generate a control signal to control a switch of the switching power converter.
摘要:
A power control system and method senses input and/or output voltages of a power supply using sense currents in order for an integrated circuit (IC) switch state controller to generate a control signal to control a switch of the power control system. By sensing sense currents, the power control system can eliminate at least one sense resistor used in a voltage sense system. The sense current(s) can be used to provide power and sensing to the switch state controller. In at least one embodiment, the sense current(s) provide power to the switch state controller when auxiliary IC power is unavailable or diminished, such as during start-up of the IC. In at least one embodiment, the IC draws more sense current from an input of the power control system than the output of the power control system to, for example, minimize impact on the output voltage of the power supply.
摘要:
A power supply system and method includes a switch state controller that is operational to control a switching power converter during certain power loss conditions that cause conventional switch state controllers to have diminished or no functionality. In at least one embodiment, during certain power loss conditions, such as when an auxiliary power supply is in standby mode or when the switching power converter is not operating, a power supply for the switch state controller does not provide sufficient operating power to the switch state controller during certain power loss conditions. In at least one embodiment, during such power loss conditions power is generated for the switch state controller using sense input and/or sense output currents of the switching power converter to allow an integrated circuit (IC) switch state controller to generate a control signal to control a switch of the switching power converter.