公开(公告)号：US20240405105A1

公开(公告)日：2024-12-05

申请号：US18204095

申请日：2023-05-31

Applicant: Analog Devices, Inc.

Inventor： F. Jacob Steigerwald ,  James G. Fiorenza ,  Guanghai Ding ,  Susan L. Feindt ,  Pengfei Wu ,  Clifford Alan King

IPC: H01L29/737 ,  H01L21/84 ,  H01L27/12 ,  H01L29/165 ,  H01L29/205 ,  H01L29/66

Abstract: Techniques of integrating lateral HBT devices into a silicon on insulator (SOI) CMOS process. Similar approaches could also be applied to Fin Field-Effect Transistors (FinFETs). A first technique makes use of a CMOS replacement gate process that is typically associated with a partially depleted SOI (PDSOI) or fully depleted SOI (FDSOI) process. A second technique is independent of the CMOS process. Both techniques can accommodate silicon germanium (SiGe) and/or III-V materials, include a self-aligned base contact, and can be used to construct both NPN and PNP transistors with varied peak fT and breakdown voltages.