公开(公告)号：US20240421217A1

公开(公告)日：2024-12-19

申请号：US18209977

申请日：2023-06-14

Applicant: Analog Devices, Inc.

Inventor： James G. Fiorenza ,  Daniel Piedra ,  Justin Scott Reiter ,  Michael Gurr

IPC: H01L29/778 ,  H01L23/373 ,  H01L29/20 ,  H01L29/66

Abstract: Techniques that separate the heat generation from the active device and that add a thermal heat shield layer between the heat generation and the active device to reduce the channel temperature in the areas that determine the reliability of a semiconductor device.

公开(公告)号：US20230122090A1

公开(公告)日：2023-04-20

申请号：US17504391

申请日：2021-10-18

Applicant: Analog Devices, Inc.

Inventor： James G. Fiorenza ,  Daniel Piedra

IPC: H01L21/02 ,  H01L29/20 ,  H01L29/205 ,  H01L29/778 ,  H01L29/66

Abstract: Electric field management techniques in GaN based semiconductors that utilize patterned regions of differing conductivity under the active GaN device, such as a GaN high electron mobility transistor (HEMT), are described. As an example, a patterned layer of oxidized silicon can be formed superjacent a layer of silicon dioxide during or prior to the heteroepitaxy of GaN or another semiconductor material. These techniques can be useful for back-side electric field management because a silicon layer, for example, can be made conductive to act as a back-side field plate.

公开(公告)号：US20210091061A1

公开(公告)日：2021-03-25

申请号：US17020189

申请日：2020-09-14

Applicant: Analog Devices, Inc.

Inventor： James G. Fiorenza ,  Puneet Srivastava ,  Daniel Piedra

IPC: H01L25/18 ,  H01L25/065 ,  H01L23/00 ,  H01L25/00

Abstract: A hybrid silicon carbide (SiC) device includes a first device structure having a first substrate comprising SiC of a first conductivity type and a first SiC layer of the first conductivity type, where the first SiC layer is formed on a face of the first substrate. The first device structure also includes a second SiC layer of a second conductivity type that is formed on a face of the first SiC layer and a first contact region of the first conductivity type, where the first contact region traverses the second SiC layer and contacts the first SiC. The device also includes a second device structure that is bonded to the first device structure. The second device structure includes a switching device formed on a second substrate and a second contact region that traverses a first terminal region of the switching device and contacts the first contact region.

公开(公告)号：US20250098200A1

公开(公告)日：2025-03-20

申请号：US18940279

申请日：2024-11-07

Applicant: Analog Devices, Inc.

Inventor： James G. Fiorenza ,  Puneet Srivastava ,  Daniel Piedra

IPC: H01L29/778 ,  H01L21/265 ,  H01L21/266 ,  H01L27/088 ,  H01L29/06 ,  H01L29/20 ,  H01L29/205 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66

Abstract: An enhancement mode compound semiconductor field-effect transistor (FET) includes a source, a drain, and a gate located therebetween. The transistor further includes a first gallium nitride-based hetero-interface located under the gate and a buried region, located under the first hetero-interface, the buried p-type region configured to determine an enhancement mode FET turn-on threshold voltage to permit current flow between the source and the drain.

公开(公告)号：US12249631B2

公开(公告)日：2025-03-11

申请号：US18206974

申请日：2023-06-07

Applicant: Analog Devices, Inc.

Inventor： Puneet Srivastava ,  James G. Fiorenza

IPC: H01L29/40 ,  H01L21/02 ,  H01L29/20 ,  H01L29/205 ,  H01L29/66 ,  H01L29/778

Abstract: A semiconductor device includes a layer of a first semiconducting material, where the first semiconducting material is epitaxially grown to have a crystal structure of a first substrate. The semiconductor device further includes a layer of a second semiconducting material disposed adjacent to the layer of the first semiconducting material to form a heterojunction with the layer of the first semiconducting material. The semiconductor device further includes a first component that is electrically coupled to the heterojunction, and a second substrate that is bonded to the layer of the first semiconducting material.

公开(公告)号：US12230699B2

公开(公告)日：2025-02-18

申请号：US17067988

申请日：2020-10-12

Applicant: Analog Devices, Inc.

Inventor： Daniel Piedra ,  James G. Fiorenza ,  Puneet Srivastava

IPC: H01L29/778 ,  H01L29/10 ,  H01L29/16 ,  H01L29/20 ,  H01L29/66

Abstract: Integrated circuits can include semiconductor devices with back-side field plates. The semiconductor devices can be formed on substrates that have conductive layers located within the substrates. The conductive layers can include at least one of a conducting material or a semi-conducting material that modifies an electric field produced by the semiconductor devices. The semiconductor devices can include one or more semiconductor layers that include one or more materials having a compound material that includes at least one Group 13 element and at least one Group 15 element.

公开(公告)号：US20240213239A1

公开(公告)日：2024-06-27

申请号：US18069777

申请日：2022-12-21

Applicant: Analog Devices, Inc.

Inventor： James G. Fiorenza ,  Daniel Piedra

IPC: H01L27/02 ,  H01L29/20 ,  H01L29/40 ,  H01L29/45 ,  H01L29/66 ,  H01L29/778

CPC classification number: H01L27/0255 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/45 ,  H01L29/66462 ,  H01L29/7786

Abstract: Techniques to integrate a p-n diode with a GaN HEMT, such as in a silicon carbide (SiC) substrate. The p-n diode provides avalanche robustness to the device and over voltage protection to the transistor.

公开(公告)号：US20230154875A1

公开(公告)日：2023-05-18

申请号：US18148982

申请日：2022-12-30

Applicant: Analog Devices, Inc.

Inventor： Daniel Piedra ,  James G. Fiorenza ,  Puneet Srivastava ,  Andrew Proudman ,  Kenneth Flanders ,  Denis Michael Murphy ,  Leslie P. Green ,  Peter R. Stubler

IPC: H01L23/66 ,  H01L27/06 ,  H01L29/20 ,  H01L29/205 ,  H01L29/45 ,  H01L23/48 ,  H01L21/285 ,  H01L29/66 ,  H01L21/8252 ,  H01L29/778

CPC classification number: H01L23/66 ,  H01L21/8252 ,  H01L21/28575 ,  H01L23/481 ,  H01L27/0605 ,  H01L27/0629 ,  H01L28/60 ,  H01L29/205 ,  H01L29/452 ,  H01L29/2003 ,  H01L29/7786 ,  H01L29/66462 ,  H01L23/53214 ,  H01L2223/6616 ,  H01L2223/6683

Abstract: Gallium nitride-based monolithic microwave integrated circuits (MMICs) can comprise aluminum-based metals. Electrical contacts for gates, sources, and drains of transistors can include aluminum-containing metallic materials. Additionally, connectors, inductors, and interconnect devices can also comprise aluminum-based metals. The gallium-based MMICs can be manufactured in complementary metal oxide semiconductor (CMOS) facilities with equipment that produces silicon-based semiconductor devices.

公开(公告)号：US20230133481A1

公开(公告)日：2023-05-04

申请号：US18148996

申请日：2022-12-30

Applicant: Analog Devices, Inc.

Inventor： Daniel Piedra ,  James G. Fiorenza ,  Puneet Srivastava ,  Andrew Proudman ,  Kenneth Flanders ,  Denis Michael Murphy ,  Leslie P. Green ,  Peter R. Stubler

IPC: H01L23/66 ,  H01L27/06 ,  H01L29/20 ,  H01L29/205 ,  H01L29/45 ,  H01L23/48 ,  H01L21/285 ,  H01L29/66 ,  H01L21/8252 ,  H01L29/778

Abstract: Gallium nitride-based monolithic microwave integrated circuits (MMICs) can comprise aluminum-based metals. Electrical contacts for gates, sources, and drains of transistors can include aluminum-containing metallic materials. Additionally, connectors, inductors, and interconnect devices can also comprise aluminum-based metals. The gallium-based MMICs can be manufactured in complementary metal oxide semiconductor (CMOS) facilities with equipment that produces silicon-based semiconductor devices.

公开(公告)号：US20250098195A1

公开(公告)日：2025-03-20

申请号：US18291799

申请日：2021-08-03

Applicant: Analog Devices, Inc.

Inventor： James G. Fiorenza ,  Daniel Piedra

IPC: H01L29/66 ,  H01L21/324 ,  H01L29/778

Abstract: Various techniques for impurity dopant reduction in GaN regrowth are described. In a first technique, a barrier layer, such as AlN, can be formed at a regrowth interface before the regrown GaN layer. The barrier layer can bury the impurities at the regrowth interface and reduce their effect on the layers above that include the channel of the device, e.g., transistor. In a second technique, a buffer layer, such as a carbon-doped GaN layer, can be formed at the regrowth interface before the regrown GaN layer. Carbon can act as an acceptor to compensate for the dopants. e.g., silicon, and cancel their electronic effect on the above layers. In a third technique, a hydrogen bake treatment can be performed before the GaN regrowth. Hydrogen can desorb a thin layer of GaN at the regrowth interface, which is the GaN layer with the highest concentration of impurities.