公开(公告)号：US07991817B2

公开(公告)日：2011-08-02

申请号：US11655745

申请日：2007-01-19

申请人： Andre M. DeHon ,  Nachiket Kapre

发明人： Andre M. DeHon ,  Nachiket Kapre

IPC分类号： G06F7/42 ,  G06F7/38

CPC分类号： G06F7/49942 ,  G06F7/485 ,  G06F7/508 ,  G06F7/509

摘要： An apparatus and method that use an associative calculator for calculating a sequence of non-associative operations on a set of input data, comprising: using the associative calculator to calculate from the set of input data an evaluated value of each operation of said sequence as if the non-associative operations were associative operations; detecting if some of the evaluated values are erroneous; if there are erroneous evaluated values, correcting the erroneous evaluated values; and if there are no erroneous evaluated value, outputting as the result of the sequence of non-associative operations the evaluated value of the last operation of the sequence.

摘要翻译： 一种使用关联计算器来计算一组输入数据的非关联操作序列的装置和方法，包括：使用所述关联计算器从所述输入数据集合中计算所述序列的每个操作的估计值，如同 非关联操作是关联操作; 检测某些评估值是否错误; 如果存在错误的评估值，则校正错误的评估值; 并且如果没有错误的评估值，则作为非关联操作序列的结果输出序列的最后操作的评估值。

公开(公告)号：US07310004B2

公开(公告)日：2007-12-18

申请号：US11193308

申请日：2005-07-28

申请人： Andre M. DeHon

发明人： Andre M. DeHon

IPC分类号： H01L25/00 ,  H03K19/177

CPC分类号： H03K19/17736 ,  H03K19/17728 ,  H03K19/1778 ,  H03K19/17796

摘要： An apparatus and methods for interconnecting a plurality of nanoscale programmable logic array (PLA) clusters are disclosed. The appartus allows PLA clusters to be built at nanoscale dimensions, signal restoration to occur at the nanoscale, and interconnection between PLA clusters to be performed with nanoscale wiring. The nanoscale PLA, restoration, and interconnect arrangements can be constructed without using lithographic patterning to produce the nanoscale feature sizes and wire pitches. The nanoscale interconnection of the plurality of nanoscale PLA clusters can implement any logic function or any finite state machine. The nanoscale interconnect allows Manhattan (X,Y grid) routing between arbitrary nanoscale PLA clusters. The methods teach how to interconnect nanoscale PLAs with nanoscale interconnect and how to build arbitrary logic with nanoscale feature sizes without using lithography to pattern the nanoscale features.

摘要翻译： 公开了一种用于互连多个纳米尺度可编程逻辑阵列（PLA）群集的装置和方法。 该配件允许PLA簇以纳米级尺寸构建，信号恢复发生在纳米尺度，PLA簇之间的互连将通过纳米级布线进行。 可以构建纳米尺度PLA，恢复和互连布置，而不使用平版印刷图案以产生纳米尺寸特征尺寸和线间距。 多个纳米尺度PLA簇的纳米尺度互连可以实现任何逻辑功能或任何有限状态机。 纳米尺度互连允许曼哈顿（X，Y网格）在任意纳米级PLA集群之间布线。 该方法教导了如何将纳米级PLA与纳米尺度互连互连，以及如何使用纳米级特征尺寸构建任意逻辑，而无需使用光刻技术对纳米尺度特征进行图案化。