公开(公告)号：US06462557B1

公开(公告)日：2002-10-08

申请号：US09570874

申请日：2000-05-15

申请人： Andrea Milanesi ,  Stefania Chicca ,  Vanni Poletto ,  Valerio Giorgetta ,  Stefano Sgatti ,  Sergio Vigna

发明人： Andrea Milanesi ,  Stefania Chicca ,  Vanni Poletto ,  Valerio Giorgetta ,  Stefano Sgatti ,  Sergio Vigna

IPC分类号： G08B2100

CPC分类号： G01R31/024

摘要： A system for diagnosing a driver and detecting circuit anomalies therein includes: voltage comparator circuits for generating diagnostic logic signals, each of which indicates the existence of a corresponding type of anomaly; and a coding circuit to receive the diagnostic logic signals and to output information relating to an overall operating state of the driver. The coding circuit includes a first portion to provide at its output first logic input signals indicating the last anomaly to occur since a system reset operation. The coding circuit also includes a second portion for coding the first logic input signals. The second portion includes a sequential logic network to receive the first logic input signals and at least one second logic signal indicating the current operating phase of the driver. The second portion provides, as a function of the first and second logic signals, a stable internal state to determine the output information in the form of an N bit coded word. The N bit coded word is representative of the occurrence of an anomaly, of an absence of an anomaly in the current operating phase, or of an absence of an anomaly in any operating phase.

摘要翻译： 用于诊断驱动器并检测电路异常的系统包括：用于产生诊断逻辑信号的电压比较器电路，每个诊断逻辑信号指示存在相应类型的异常; 以及编码电路，用于接收诊断逻辑信号并输出​​与驾驶员的总体操作状态有关的信息。 编码电路包括第一部分，在其输出端提供第一逻辑输入信号，指示自系统复位操作以来发生的最后一个异常。 编码电路还包括用于对第一逻辑输入信号进行编码的第二部分。 第二部分包括用于接收第一逻辑输入信号的顺序逻辑网络和指示驾驶员的当前操作阶段的至少一个第二逻辑信号。 第二部分提供作为第一和第二逻辑信号的函数的稳定的内部状态，以以N位编码字的形式确定输出信息。 N位编码字表示在当前操作阶段中不存在异常或者在任何操作阶段中不存在异常的异常的发生。

公开(公告)号：US06292341B1

公开(公告)日：2001-09-18

申请号：US09295842

申请日：1999-04-21

申请人： Andrea Milanesi ,  Stefania Chicca ,  Marco Morelli ,  Vanni Poletto

发明人： Andrea Milanesi ,  Stefania Chicca ,  Marco Morelli ,  Vanni Poletto

IPC分类号： H02H318

CPC分类号： H03K17/0822

摘要： A protection circuit of a diagnostic output line (K-line) of a control unit for protection of the control unit in the event of a ground disconnection or of a “below ground” condition is provided. The diagnostic output line includes a first interface DMOS transistor with a source connected to ground and a drain coupled to the diagnostic output line through a second DMOS transistor with a source connected to the output line and a drain connected to the source of the first DMOS transistor. The protection circuit also includes a comparator for the voltage of the diagnostic output line with the potential of the ground node, and a two-input logic gate, whose output controls a current generator forcing a current, limited by a resistor, on the diagnostic output line.

摘要翻译： 提供用于在接地断开或“低于地面”情况下保护控制单元的控制单元的诊断输出线（K线）的保护电路。 诊断输出线包括具有源极连接到地的第一接口DMOS晶体管和通过连接到输出线的源极的第二DMOS晶体管耦合到诊断输出线的漏极，以及连接到第一DMOS晶体管的源极的漏极 。 保护电路还包括用于具有接地节点的电位的诊断输出线的电压的比较器，以及双输入逻辑门，其输出控制电流发生器强制由电阻器限制的电流在诊断输出端 线。

公开(公告)号：US5886510A

公开(公告)日：1999-03-23

申请号：US932063

申请日：1997-09-15

申请人： Angelo Crespi ,  Stefania Chicca ,  Paolo Mastella ,  Vanni Poletto

发明人： Angelo Crespi ,  Stefania Chicca ,  Paolo Mastella ,  Vanni Poletto

IPC分类号： G01R15/14 ,  G01R19/00 ,  G01R19/165 ,  G01R31/00 ,  G01R31/02 ,  G01R31/28 ,  G05F1/40

CPC分类号： G01R31/026 ,  G01R31/006 ,  G01R15/14 ,  G01R19/0023 ,  G01R19/16519

摘要： A circuit for diagnosing the state of a load connected to a driver includes a DMOS transistor interposed between a terminal of the load and voltage comparator circuits. The DMOS transistor limits the maximum voltage input to the comparators to thereby reduce the circuit area occupied by the comparators and consequently to reduce the cost of the diagnosis circuit.

摘要翻译： 用于诊断连接到驱动器的负载的状态的电路包括插入在负载的端子和电压比较器电路之间的DMOS晶体管。 DMOS晶体管限制了比较器的最大电压输入，从而减小了比较器占用的电路面积，从而降低了诊断电路的成本。

公开(公告)号：US5896057A

公开(公告)日：1999-04-20

申请号：US865721

申请日：1997-05-30

申请人： Stefania Chicca ,  Vanni Poletto ,  Marco Morelli

发明人： Stefania Chicca ,  Vanni Poletto ,  Marco Morelli

IPC分类号： G01R31/00 ,  H02H7/08 ,  H02H7/122 ,  H03K17/56

CPC分类号： H02H7/0844 ,  G01R31/006 ,  H02H7/1225

摘要： A troubleshooting circuit for locating malfunctions while driving an electric load by means of a bridge stage (M1, M2, M3, M4) which is connected between ground (GND) and the power supply (+VCC) in series with first and second resistors (Rsl, Rsh), respectively. First (COMP1) and second (COMP2) threshold comparators are coupled to the first resistor to sense a short-circuit to battery (+VCC) and an open-load condition, respectively. Coupled to the second resistor is a third threshold comparator (COMP3) adapted to sense a short-circuit to ground. The output signals from the comparators are sampled through flip-flops (FF1, FF2, FF3, FF4, FF5, FF6) upon a transistor in the bridge being switched to the off state.

摘要翻译： 用于通过连接在接地（GND）和与第一和第二电阻器（GND）和电源（+ VCC）串联的桥接级（M1，M2，M3，M4）来驱动电力负载的定位故障的故障排除电路 Rsl，Rsh）。 第一（COMP1）和第二（COMP2）阈值比较器分别耦合到第一电阻器以感测到电池（+ VCC）和开路负载条件的短路。 耦合到第二电阻器的是第三阈值比较器（COMP3），其适于感测到对地短路。 当桥接器中的晶体管切换到关闭状态时，来自比较器的输出信号通过触发器（FF1，FF2，FF3，FF4，FF5，FF6）进行采样。