公开(公告)号：US06618778B1

公开(公告)日：2003-09-09

申请号：US09637987

申请日：2000-08-11

Applicant: Andrew MacCormack

Inventor： Andrew MacCormack

IPC: G06F1314

CPC classification number: G06F13/364

Abstract: An arbiter for arbitrating between a plurality of requests from a plurality of requesters, said arbiter being arranged to assign an order of priority of said requesters, the requester having the highest priority and which has made a request winning the arbitration, wherein the arbiter determines a new priority for said winning requester, said winner being given a priority different from the lowest priority.

Abstract translation: 一种仲裁器，用于在来自多个请求者的多个请求之间进行仲裁，所述仲裁器被配置为分配所述请求者的优先级顺序，所述请求者具有最高优先级并且已经请求中断仲裁的请求，其中仲裁器确定 所述获胜请求者的新优先权，所述优胜者被赋予与最低优先权不同的优先权。

公开(公告)号：US07730515B1

公开(公告)日：2010-06-01

申请号：US09239907

申请日：1999-01-29

Applicant: Andrew MacCormack ,  Howard Gurney ,  William Robbins ,  Fabrizio Rovati

Inventor： Andrew MacCormack ,  Howard Gurney ,  William Robbins ,  Fabrizio Rovati

IPC: H04N7/16

CPC classification number: H04N21/434

Abstract: The present invention relates to the demultiplexing of a digital data stream in a receiver so as to retain only those parts of the digital data stream required by the receiver. Such demultiplexing is particularly useful when applied to a receiver circuit in a television system having a digital set-top-box.A memory in the receiver stores packet identifiers of data packets required by the receiver, which are stored in the memory under the control of a first control circuit. A second control circuit extracts packet identifiers from incoming data packets in an input digital data stream. A third control circuit receives the extracted packet identifier and determines whether this matches one of the packet identifiers stored in the memory. A match signal is set by the third control circuit to the second control circuit responsive to a match. The second control circuit demultiplexes the input data packet responsive to the match signal.

Abstract translation: 本发明涉及在接收机中解复用数字数据流，以仅保留接收机所需的数字数据流的那些部分。 当应用于具有数字机顶盒的电视系统中的接收机电路时，这种解复用特别有用。 接收机中的存储器存储由第一控制电路控制的存储在存储器中的接收机所需的数据分组的分组标识符。 第二控制电路从输入数字数据流中的输入数据分组提取分组标识符。 第三控制电路接收提取的分组标识符并确定它是否匹配存储在存储器中的分组标识符之一。 响应于匹配，第三控制电路将匹配信号设置到第二控制电路。 第二控制电路响应于匹配信号对输入数据分组进行解复用。

公开(公告)号：US06859850B1

公开(公告)日：2005-02-22

申请号：US09240176

申请日：1999-01-29

Applicant: Andrew MacCormack

Inventor： Andrew MacCormack

IPC: H04N5/00 ,  G06F13/00

CPC classification number: H04N21/434

Abstract: A controller for controlling direct memory access. Such a controller is particularly applicable when applied to a transport interface in the receiver of a digital set-top-box for television systems. A storage means stores the base and top addresses of a circular buffer in a memory to which received data is to be forwarded and stored, and a write pointer for such buffer is also stored in the storage means. Addressing circuitry generates the address to which the receive data is to be written in dependence on the stored base and top addresses and the write pointer. Output circuitry writes the data into the circular buffer at the location identified by the generated address.

Abstract translation: 用于控制直接存储器访问的控制器。 当应用于用于电视系统的数字机顶盒的接收机中的传输接口时，这种控制器特别适用。 存储装置将循环缓冲器的基地址和顶部地址存储在要被转发和存储接收数据的存储器中，并且用于这种缓冲器的写指针也存储在存储装置中。 寻址电路根据存储的基地址和顶部地址以及写入指针生成要写入接收数据的地址。 输出电路将数据写入由生成的地址标识的位置的循环缓冲区。

公开(公告)号：US06327683B1

公开(公告)日：2001-12-04

申请号：US09240225

申请日：1999-01-29

Applicant: Andrew MacCormack

Inventor： Andrew MacCormack

IPC: G01R3128

CPC classification number: G11C29/32 ,  G01R31/318536

Abstract: A circuit and method for scan testing some or all connections to a device, the device under test having at least one output and a plurality of inputs greater than the number of outputs. Such a device typically includes built-in self-test capability. An exclusive-OR gate receives the plurality of inputs and generates an exclusive-OR output. A multiplexer receives the at least one data output and the exclusive-OR as respect inputs, and selectively outputs one of such as a data output. Such selection of the output of the multiplexer is controlled responsive to a scan test signal, the exclusive-OR output being output from the multiplexer in a scan test.

Abstract translation: 一种用于扫描测试与设备的一些或所有连接的电路和方法，被测设备具有至少一个输出和大于输出数量的多个输入。 这样的设备通常包括内置的自检能力。 异或门接收多个输入并产生异或输出。 多路复用器接收至少一个数据输出和异或作为输入，并选择性地输出诸如数据输出之一。 响应于扫描测试信号控制多路复用器的输出的这种选择，在扫描测试中异或输出是从多路复用器输出的。