公开(公告)号：US07065080B1

公开(公告)日：2006-06-20

申请号：US09676997

申请日：2000-09-29

申请人： Ange Aznar ,  Daniel Orsatti ,  Jean-Claude Zunino ,  Bruno Rousseau

发明人： Ange Aznar ,  Daniel Orsatti ,  Jean-Claude Zunino ,  Bruno Rousseau

IPC分类号： H04L12/56

CPC分类号： H04L12/5601 ,  H04L2012/5627

摘要： In an ATM cell-relay network usually comprising several switching nodes a method enabling remote surveillance of any entry port to any switching node of the network. The method first assumes that a path is set up from the entry port to a remote observation point. Then, all cells of the incoming traffic, entering entry port to be watched, are duplicated and marked. After which they are transported, unaltered, following the path, up to the observation point. The invention permits that any entry port of an ATM network, that may well span over large geographic areas, be conveniently observable and analyzed transparently i.e., without disturbing users traffic, from a remote location so as network can be maintained and run trouble free.

摘要翻译： 在通常包括多个交换节点的ATM信元中继网络中，能够对网络的任何交换节点进行任何入口端口的远程监控的方法。 该方法首先假设从入口到远程观察点建立路径。 然后，进入流量的所有单元格，进入要被监视的入口端口，被复制并标记。 之后，他们被运送，不变，跟随路径，直到观察点。 本发明允许可以方便地观察和分析ATM网络的任何进入端口，其可以跨越大的地理区域，并且透明地被分析，即不会干扰来自远程位置的用户业务，从而可以维护网络并且无故障地运行。

公开(公告)号：US06907007B2

公开(公告)日：2005-06-14

申请号：US09766074

申请日：2001-01-19

申请人： Ange Aznar ,  Claude Basso ,  Mathieu Girard ,  Daniel Orsatti ,  Dominique Rigal ,  Jean-Claude Zunino

发明人： Ange Aznar ,  Claude Basso ,  Mathieu Girard ,  Daniel Orsatti ,  Dominique Rigal ,  Jean-Claude Zunino

IPC分类号： H04L12/70 ,  H04L12/935 ,  H04Q11/04 ,  G01R31/08

CPC分类号： H04L49/3081 ,  H04L2012/5625 ,  H04Q11/0478

摘要： A method and system for injecting/extracting a control cell into/from a data connection transmitted from a source switching node to a destination switching node of an Asynchronous Transfer Mode (ATM) network. The injecting method consists in adding to the ATM cell a switch routing label (SRL) and a protocol engine correlator (PEC) by the control point of the injection switching node before injecting the cell into the connection. The extracting method consists in setting a control flag in the control block of the incoming cell if this cell includes an extraction condition indicating that it is a control cell to be extracted, and adding to the control cell a switch routing label corresponding to the control point (CP SRL) and a reserved static protocol engine correlator (SPEC).

摘要翻译： 一种用于将控制单元注入/提取到从源交换节点发送到异步传输模式（ATM）网络的目的地交换节点的数据连接的方法和系统。 注入方法是在将小区注入连接之前，通过注入交换节点的控制点向ATM信元添加交换机路由标签（SRL）和协议引擎相关器（PEC）。 该提取方法包括：如果该小区包括指示其是要提取的控制小区的提取条件，则在进入小区的控制块中设置控制标志，并且向控制小区添加与控制点对应的交换路由标签 （CP SRL）和保留的静态协议引擎相关器（SPEC）。

公开(公告)号：US06772371B1

公开(公告)日：2004-08-03

申请号：US09691511

申请日：2000-10-18

申请人： Daniel Orsatti ,  Dominique Rigal ,  Bruno Rousseau ,  Jean-Claude Zunino

发明人： Daniel Orsatti ,  Dominique Rigal ,  Bruno Rousseau ,  Jean-Claude Zunino

IPC分类号： G06F1100

CPC分类号： G06F11/362

摘要： A system and method for freezing a processing unit to facilitate on-line debugging of a protocol engine within a switching node of a data transmission network. In accordance with the system of the present invention, the protocol engine includes a plurality of processing units such as an identification unit, a lookup unit, a traffic management and congestion unit, an enqueue unit, a dequeue unit, a traffic management scheduling unit, a frame transmission unit, a control unit, and a control block unit. The control block unit includes a freeze register containing multiple freeze bits, wherein each freeze bit is associated with one processing unit. In response to setting a freeze bit, resources and settings of a processing unit associated with the set freeze bit are prevented from being changed by the processing unit.

摘要翻译： 一种用于冻结处理单元以促进数据传输网络的交换节点内的协议引擎的在线调试的系统和方法。 根据本发明的系统，协议引擎包​​括多个处理单元，例如识别单元，查找单元，业务管理和拥塞单元，入队单元，出队单元，业务管理调度单元， 帧发送单元，控制单元和控制块单元。 控制块单元包括一个包含多个冻结位的冻结寄存器，其中每个冻结位与一个处理单元相关联。 响应于设置冻结位，防止与设置的冻结位相关联的处理单元的资源和设置被处理单元改变。

公开(公告)号：US5923664A

公开(公告)日：1999-07-13

申请号：US824941

申请日：1997-03-27

申请人： Jean-Paul Aldebert ,  Jean Calvignac ,  Daniel Orsatti ,  Fabrice Verplanken ,  Jean-Claude Zunino

发明人： Jean-Paul Aldebert ,  Jean Calvignac ,  Daniel Orsatti ,  Fabrice Verplanken ,  Jean-Claude Zunino

IPC分类号： H04L12/70 ,  H04Q11/04 ,  H04J3/16 ,  H04J3/22 ,  H04J3/24

CPC分类号： H04Q11/0478 ,  H04L2012/5615

摘要： The invention discloses a method and an apparatus for implementing the physical interface in a network element connected to a packet network such as Asynchronous Transfer Mode (ATM) network. With the solution of the invention, the physical interface functions can be integrated on one chip for more than one network port. The physical interface is provided between port bit streams at media speed and word data flow transferred onto/from a bus which is under the control of the network equipment. The solution of the invention includes grouping logics and storage elements by islands of more than one port. Furthermore, the logics and storage elements for statistical counting operations can be grouped for a processing generalized to all ports. Finally, the solution of the present invention takes into account two characteristics of the physical interface which are the different rates between network link media speed and bus access rate and the technology of the high density static imbedded RAMs used for hardware integration. The Flip/Flop pointer RAMs of Flip/Flop data RAMs are duplicated and some interface RAMs are created to transfer control data between the islands and the generalized processing logical blocks.

摘要翻译： 本发明公开了一种在连接到诸如异步传输模式（ATM）网络的分组网络的网络元件中实现物理接口的方法和装置。 通过本发明的解决方案，物理接口功能可以集成在多个网络端口的一个芯片上。 在媒体速度的端口比特流之间提供物理接口，并且传输到/经由网络设备控制的总线上的字数据流。 本发明的解决方案包括通过多于一个端口的岛分组逻辑和存储元件。 此外，用于统计计数​​操作的逻辑和存储元件可以被分组用于对所有端口进行泛化。 最后，本发明的解决方案考虑了物理接口的两个特征，它们是网络链路媒体速度和总线访问速率之间的不同速率以及用于硬件集成的高密度静态嵌入RAM的技术。 翻转/翻转数据RAM的翻转/翻转指针RAM被复制，并且创建一些接口RAM以在岛和广义处理逻辑块之间传送控制数据。

公开(公告)号：US5794033A

公开(公告)日：1998-08-11

申请号：US547635

申请日：1995-10-24

申请人： Jeane-Paul Aldebert ,  Claude Basso ,  Jean Calvignac ,  Paul Chemla ,  Daniel Orsatti ,  Fabrice Verplanken ,  Jean-Claude Zunino

发明人： Jeane-Paul Aldebert ,  Claude Basso ,  Jean Calvignac ,  Paul Chemla ,  Daniel Orsatti ,  Fabrice Verplanken ,  Jean-Claude Zunino

IPC分类号： G06F13/38 ,  H03K19/177

CPC分类号： G06F13/4256

摘要： The invention discloses a method and an apparatus for in-line and on-site updating of Field Programmable Gate Arrays with remote loaded configuration data files. Flash EEPROMs which are used because of their non-volatile memories and their high density, are storing more than one configuration data file. The memories are divided in more than one part, each part of the memory for storing one configuration data file. One part of the memory also contains a flag identifying the currently loaded configuration data file. The Flash EPROM's bits being set to one same binary value before any writing operation, including the update of the configuration data file containing the flag. The setting of the bits to said binary value always identifies a valid other configuration data file in order to insure a correct re-loading of the FPGAs in case of reception of an unexpected event leading to an initialization.

摘要翻译： 本发明公开了一种用于使用远程加载的配置数据文件进行现场可编程门阵列的在线和现场更新的方法和装置。 由于其非易失性存储器及其高密度使用的闪存EEPROM存储多个配置数据文件。 存储器分为多个部分，存储器的每个部分用于存储一个配置数据文件。 存储器的一部分还包含标识当前加载的配置数据文件的标志。 闪存EPROM的位在任何写入操作之前被设置为相同的二进制值，包括更新包含该标志的配置数据文件。 对所述二进制值的位的设置总是标识有效的其他配置数据文件，以便在接收到导致初始化的意外事件的情况下确保正确地重新加载FPGA。